'concurrent' related articles 1

  1. 2007/10/17 SST36VF1602 - 16 Megabit Concurrent SuperFlash

* Organized as 1M x16
* Dual-Bank Architecture for Concurrent Read/Write Operation
– 16 Mbit Bottom Sector Protection
- SST36VF1601: 12 Mbit + 4 Mbit
– 16 Mbit Top Sector Protection
- SST36VF1602: 4 Mbit + 12 Mbit
* Single 2.7-3.6V Read and Write Operations
* Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
* Low Power Consumption:
– Active Current: 25 mA (typical)
– Standby Current: 4 μA (typical)
– Auto Low Power Mode: 4 μA (typical)
* Hardware Sector Protection/WP# Input Pin
– Protects 4 outer most sectors (4 KWord) in the larger bank by driving WP# low and unprotects by driving WP# high
* Hardware Reset Pin (RESET#)
– Resets the internal state machine to reading data array
* Sector-Erase Capability
– Uniform 1 KWord sectors
* Block-Erase Capability
– Uniform 32 KWord blocks
* Read Access Time
– 70 and 90 ns
* Latched Address and Data
* Fast Erase and Word-Program:
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Chip-Erase Time: 70 ms (typical)
– Word-Program Time: 14 μs (typical)
– Chip Rewrite Time: 8 seconds (typical)
* Automatic Write Timing
– Internal VPP Generation
* End-of-Write Detection
– Toggle Bit
– Data# Polling
– Ready/Busy# pin
* CMOS I/O Compatibility
* Conforms to Common Flash Memory Interface (CFI)
* JEDEC Standards
– Flash EEPROM Pinouts and command sets
* Packages Available
– 48-Pin TSOP (12mm x 20mm)
– 48-Ball TFBGA (8mm x 10mm)

The SST36VF1601/1602 are 1M x16 CMOS Concurrent Read/Write Flash Memory manufactured with SST’s proprietary, high performance CMOS SuperFlash technology.
The split-gate cell design and thick oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches.The SST36VF1601/ 1602 write (Program or Erase) with a 2.7-3.6V power supply. The SST36VF1601/1602 devices conform to JEDEC standard pinouts for x16 memories.
Featuring high performance Word-Program, the SST36VF1601/1602 devices provide a typical Word-Program time of 14 μsec. The devices use Toggle Bit or Data# Polling to detect the completion of the Program or Erase operation. To protect against inadvertent write, the SST36VF1601/1602 devices have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, the SST36VF1601/1602 devices are offered with a guaranteed endurance of 10,000 cycles. Data retention is rated at greater than 100 years.
The SST36VF1601/1602 are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, the SST36VF1601/1602 significantly improve performance and reliability, while lowering power consumption.
The SST36VF1601/1602 inherently use less energy during Erase and Program than alternative flash technologies.
The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. The SST36VF1601/1602 also improve flexibility while lowering the cost for program, data, and configuration storage applications.
The SuperFlash technology provides fixed Erase and Program times, independent of the number of Erase/ Program cycles that have occurred. Therefore the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Program times increase with accumulated Erase/Program cycles.
To meet high density, surface mount requirements, the SST36VF1601/1602 are offered in 48-pin TSOP and 48- ball TFBGA packages. See Figures 3 and 4 for pinouts.


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