The HD66113T is a common driver for large dot matrix liquid crystal graphics displays. It features 120 channels which can be divided into two groups of 60 channels by selecting data input/output pins. The driver is powered by about 3V, making it suitable for the design of portable equipment which fully utilizes the low power dissipation of liquid crystal elements. The HD66113T, packaged in a slim tape carrier package (slim-TCP), makes it possible to reduce the size of the user area (wiring area).

*Duty cycle: About 1/100 to 1/480
*120 LCD drive circuits
*High LCD driving voltage: 14V to 40V
*Output division function (2 ´ 60-channel outputs)
*Display off function
*Operating voltage: 2.5V to 5.5V
*Low output impedance: 0.7 kW (typ)

HD66113TA0, HD66113TA1

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 The patent-pending ACT8798 is a complete, costeffective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of portable handheld equipment.
This device integrates three step-down DC/DC converters and three low dropout linear regulators (LDOs) into a single, thin, space-saving package. An I2C Serial Interface provides programmability for the DC/DC converters and LDOs.
REG1, REG2 and REG3 are fixed-frequency, current-mode PWM step-down DC/DC converters that are optimized for high efficiency and are capable of supplying up to 1.2A, 1.2A and 750mA, respectively.
REG4, REG5 and REG6 are low noise, high PSRR linear regulators that are capable of supplying up to 250mA each.
The ACT8798 is available in a tiny 4mm x 4mm 24-pin Thin-QFN package that is just 0.75mm thin.

* Multiple Patents Pending
* Six Integrated Regulators
- 1.2A PWM Step-Down DC/DC
- 1.2A PWM Step-Down DC/DC
- 750mA PWM Step-Down DC/DC
- 250mA Low Noise LDO
- 250mA Low Noise LDO
- 250mA Low Noise LDO
* I2CTM Compatible Serial Interface
- Programmable Output Voltages
- Configurable Operating Modes
* Minimal External Components
* 4x4mm, Thin-QFN (TQFN44-24) Package
- Only 0.75mm Height
- RoHS Compliant

* Portable Devices and PDAs
* Wireless Handhelds
* DMB Enabled Devices
* GPS Receivers, etc.

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General Description
 The DM163 is a LED driver that comprises shift registers, data latches, 8x3-channel constant current circuitry with current value set by 3 external resistors, and 64 x 256 gray level PWM (Pulse Width Modulation) function unit.
Each channel provides a maximum current of 60 mA.
The grayscale data are separated into BANK0 and BANK1 respectively, selected by SELBK pin. BANK0 is 6-bits grayscale data and the BNAK1 is 8-bits grayscale data.
Depending on the system requirement, both PWM banks could be utilized jointly to achieve maximum 8+6 bit grayscale performance.
Alternatively, users can choose either 64-graylevel bank or 256-graylevel bank for dot correction, and the remaining bank as image data.
DM163 could also be constructed as a PWM controller for LED drivers.
When VDDH is connected to VDD, each of the 24 output channels outputs can act as an inverse digital signal for controlling the LED driver.

* 24 Output Channels
* 8 + 6-bits PWM grayscale Control
* Constant Current Output: 5mA to 60mA
* LED Power Supply Voltage up to 17V
* VDD=3V to 5.5V
* Varied Output Current Level Set By 3 External Resistors
* Serial Shift-In Architecture for Grayscale Data

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 The MT90502 Multi-Channel AAL2 SAR bridges a standard TDM (Time Division Multiplexed) backplane to a standard ATM (Asynchronous Transfer Mode) bus.
The device provides the CPS (Common Part Sublayer) and SAR (Segmentation and Reassembly) engines.
The MT90502 has the capability of simultaneously processing 1023 bi-directional CIDs (AAL2 Channel Identifiers) and 1023 bi-directional VCs (Virtual Circuits).
The device can be connected directly to an H.110 compatible bus.
The TDM bus consists of 32 bi-directional serial data streams operating at 2.048, 4.096, or 8.192 Mbits/s.
The MT90502 directly accepts G.711 PCM (Pulse Code Modulation) and G.726 ADPCM (Adaptive Differential Pulse Code Modulation) traffic for packetisation.
For these two data formats, the device also implements silence suppression and comfort noise generation.
To support other voice compression algorithms, the MT90502 connects directly to commercially available DSPs through synchronous serial data streams.
The Variable Bit Rate (VBR) traffic is HDLC encapsulated and carried over the serial data streams.
The interface to the ATM domain is provided by three UTOPIA Level 1 ports (Ports A, B, and C). All three of the UTOPIA ports can operate in ATM (master) or PHY (slave) mode. Ports A and B combined, architects a compliant UTOPIA Level 2 Multi-PHY port.
The MT90502 provides the capability of routing ATM cells to different UTOPIA interfaces, SAR engine or CPU.
This feature can be used to connect another MT90502 (to support up to 2046 CID channels or 2046 phone calls) and/or to connect an external AAL1 and/or AAL5 SAR.

* AAL2 Segmentation Reassembly device capable of simultaneously processing up to 1023 active CIDs (AAL2 Channel Identifier) and 1023 active VCs (Virtual Circuits).
* Support for up to 255 CIDs per VC. Maximum of 1023 CIDs.
* Implements AAL2 Common Part Sub-layer (CPS) functions specified in ITU I.363.2.
* Implements AAL2 Service Specific Convergence Sub-layer (SSCS) functions for G.711 PCM and G.726 ADPCM voice.
* Supports 44-byte PCM or ADPCM packet profiles specified in AF-VMOA-0145.00.
* CPS packet payload can support up to 64-bytes.
* Supports over-subscription of 10:1.
* H.100/H.110 compatible TDM bus for PCM or ADPCM data. Supports both master and slave TDM bus clock operation.
* TDM bus also supports compressed voice such as ITU G.723, G.728 and G.729 through HDLC encapsulation.
* Three UTOPIA Level 1 ports configurable as PHY or ATM allowing for connection to an external AAL5 SAR processor, or for chaining multiple MT90502 devices. Ports A & B are configurable as a single 8-bit UTOPIA Level 2 PHY port with 5 ADDR lines.
* UTOPIA module provides a cell switching function with a header translation.
* Performs silence suppression for PCM and ADPCM.
* Comfort noise generation.
* Capability to inject and recover CPS packets through the CPU host processor bus.
* 8-bit or 16-bit microprocessor port, configurable to Motorola or Intel timing.
* Single rail 3.3 V, 456 PBGA.
* IEEE 1149 (JTAG) interface.

* Gateway
* ATM Edge Switch
* Next Generation Digital Loop Carrier
* Multiservice Switching Platform
* 3rd Generation Mobile System Equipment


TAG channel, Multi

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UK variant: SMX1-173-5 (10mW) Non-UK
variant: SMX1-XXX-5 (1mW-50mW)
SMX1 is small multi-channel VHF transceiver operating on 173.200MHz- 173.325MHz band.
It is also available on 151MHz band Australian allocation.
SMX1 offers a fast-route to custom frequency on any VHF band from 130MHz to 180MHz with 25kHz channel spacing.

* Conforms to ETSI EN 300 220-3 and EN 301 489-3
* Conforms to Australian/New Zealand AS/NZS 4268:2003
* High performance double superhet, 128 channel PLL synthesizer
* Data rates up to 5 kbps for standard module
* Usable range over 1km
* Fully screened. Low profile
* Feature-rich interface (RSSI, analogue and digital baseband)
* Incorporate a 1200baud dumb modem
* Re-programmable via RS232 interface
* Low power requirements

* Handheld terminals
* Heavy vehicle/machine remote controls
* EPOS equipment, barcode scanners
* Data loggers
* Industrial telemetry and telecommand
* In-building environmental monitoring and control
* High-end security and fire alarms
* Vehicle data up/download

Technical Summary
* Operating frequency: 173.200 – 173.325MHz (UK), 150.825 – 152.450MHz (Australia)
* Custom variants from 130 – 180MHz on any 1MHz band
* 128 channels controlled via RS232 interface
* Transmit power: +10dBm (10mW) nominal. Adjustable 1 – 50mW
* Supply range: 4.2V - 16V
* Current consumption: 40mA (10mW) - 65mA (50mW) transmit, 20mA receive
* Data bit rate: 5kbps max. (standard module)
* Receiver sensitivity: -120dBm (for 12 dB SINAD)
* Size: 53 x 32 x 12mm

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 The AGR09180EF is a high-voltage, gold-metalized, laterally diffused metal oxide semiconductor (LDMOS) RF power transistor suitable for cellular band, code-division multiple access (CDMA), global system for mobile communication (GSM), enhanced data for global evolution (EDGE), and time-division multiple access (TDMA) single and multicarrier class
AB wireless base station amplifier applications.
This device is manufactured on an advanced LDMOS technology, offering state-of-the-art performance, reliability, and thermal resistance.
Packaged in an industry-standard CuW package capable of delivering a minimum output power of 180 W, it is ideally suited for today's RF power amplifier applications.

* Typical performance ratings are for IS-95 CDMA,
* pilot, sync, paging, traffic codes 8—13:
- Output power (POUT): 38 W.
- Power gain: 18.25 dB.
- Efficiency: 27%.
- Adjacent channel power ratio (ACPR) for 30 kHz bandwidth (BW):
  (750 kHz offset: –45 dBc)
  (1.98 MHz offset: –60 dBc)
- Input return loss: 10 dB.
* High-reliability, gold-metalization process.
* High gain, efficiency, and linearity.
* Integrated ESD protection.
* Industry-standard packages.
* 180 W minimum output power.

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 The M74HC4852 is a dual four-channel analog MULTIPLEXER/DEMULTIPLEXER fabricated
with silicon gate C2MOS technology.
It is pin to pin compatible with the equivalent to standard HC4052 and MC14052, but features injection current effect control.
This makes this device especially suited for usage in automotive applications where voltages in excess of normal logic voltage are common.
The injection current effect control allows signals at disabled input channels to exceed the supply voltage range or go down ground without affecting the signal of the enabled analog channel.
This eliminates the need for external diode-resistor networks typically used to keep the analog channel signals within the supply voltage range.
This analog switch is bidirectional and digitally controlled.
It has two binary control inputs A and B to select 1 of 4 to be turned on, and connected to the output, and a INH input to disable all channels.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

- 215W TYP. (VCC = 3.0V)
- 150W TYP. (VCC = 4.5V)
- 160W TYP. (VCC = 6V)
* FAST SWITCHING: tpd = 8.6ns (TYP.) at TA = 25 °C, VCC = 4.5V
- HBM > 2000V (JESD22-A114B);
- MM > 200V


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 The Envy24TM is a versatile PCI multi-channel I/O controller.
It allows up to 12x2 simultaneous input and output channels with the data source or destination beingeit her analog or digital.
Some of the typical applications for this part are computer based multi-track audio, multi-channel audio, PC-based data acquisition, waveform generation and computer telephony integration.
The Envy24 can be combined with professional grade I²S converters, S/PDIF transmitters/receivers or AC-link codecs, such as the VT1611ATM.
The controller integrates a very high resolution digital mixer allowing up to 20 channels of mixing.
This is aimed specifically for monitoring final outputs, making master copies and for budget conscious studios that may lack an individual out-board mixer.
The Envy24 supplies a master I²C interface providingconnection to an E²PROM to store and retrieve PCI Subsystem and Subsystem vendor IDs, specific board configurations and custom features identification.
This interface is available for controllingother devices as well.
For target markets where legacy audio is still important, the SoundBlaster Pro compatible hardware ensures hardware compatibility under DOS for DDMA (Distributed DMA) and non-DDMA systems.
The device also includes a Microsoft Win9x architecture based DirectSound hardware accelerator that interfaces to AC’97 via AC-link.
The separate path allows concurrent operation with the 24-bit professional multi-track audio section.
The Envy24 is a “Digital-Ready” audio device allowing acceleration in cooperation with the host and redirecting audio streams to other endpoints.
The Envy24 integrates two independent MPU-401 MIDI UARTs.
This features allows hooking up multiple external MIDI devices and dedicatingthe two paths for different purposes.
Additionally, a conventional standard Joystick port and timer is integrated.
Only R and C components are necessary to complete the circuit.
Also an 8-bit GPIO brings flexibility for multi-purpose use.
The Envy24 is a power miser device due to its aggressive power management scheme and hard-wired design architecture.
The device is ACPI compliant makingit suitable for platforms designed for “OnNow”.
Dependingon the samplingra tes that need to be supported by the target solution, one or two crystals are sufficient to operate the whole system.
Alternatively, a PLL Clock synthesizer chip can be used to generate the necessary frequencies.
The clock chip can be controlled by the GPIO pins for programmability.

Product Features
* PCI 2.1 I/F with bus masteringand burst modes
* 24-bit resolution audio format support
* Samplingrates up to 96kHz
* 8x2 I/O on AC-link or I²S, up to 4x2 converters
* Simultaneous I²S for S/PDIF I/O up to 96kHz
* 20 channels, 36-bit wide digital mixer
* Monitor and master copy functions
* Peak meters on all 20 professional multi-track streams
* Concurrent 16 streams DirectSoundTM accelerator
* Sample Rate Converter for DirectSound applications
* Two MPU-401 MIDI UART ports
* ACPI and PCI PMI support
* I²C subset I/F for E²PROM (configuration and ID storage) and peripherals control
* HW SoundBlaster® Pro legacy
* FM synthesis for DOS® legacy
* 64-voices SW Wavetable General MIDI Synthesizer for Windows95
* DirectInputTM compatible Joystick port
* 8-bit GPIO port
* Windows® 95/98, NT4.0 drivers
* 24.576, 16.9344 or 22.5792 MHz crystal operation
* 3.3V operatingsupply (5V tolerant I/O)
* 128-pin PQFP (14mm x 20mm body)

Product Applications
* PC-based multi-track audio
* Discrete multi-channel audio
* High-end PCI audio
* “Pro-sumer” audio
* General purpose multi-channel I/O
* Computer telephony
* PC-based data acquisition
* PC-based waveform generation
* PC-based instrumentation
* PC-based control and automation


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 VIA Technologies’ VT1616™ 20-bit ∑Δ audio codec conforms to the AC’97 2.2 and S/PDIF Output specifications.
The VT1616 integrates Sample Rate Converters on all channels andcan be adjusted in 1Hz increments.
There is a provision in hardware for down-mixing the 6 channels into stereo when only two endpoints are available.
The analog mixer circuitry integrates a stereo enhancement to provide a pleasing 3D surround
sound effect for stereo media.
This codec is designed with aggressive power management to achieve low power consumption.
When usedwith a 3.3V analog supply, power consumption is further reduced.
The primary applications for this part are desktop and portable personal computers multimedia subsystems. However, it is suitable for any system requiring 6-channel audio output for home theater systems at competitive prices.

• AC’97 2.2 compliant codec
• 20-bit, stereo ADC and6-channel stereo DACs
• 1 Hz resolution VSR on all channels
• IntegratedIEC958 line driver for S/PDIF output
• S/PDIF compressed digital or LPCM audio out
• Hardware downmix option to 2 channels
• ADC DC removal for removing recording white noise
• 4-bit 3D stereo expansion for simulatedsurround
• 4 stereo, 2 mono analog line-level inputs
• Secondline-level output with volume control
• External Audio Amplifier Control
• Low Power consumption mode
• Exceeds Microsoft® WHQL logo requirements
• 3.3V digital, 3.3 or 5V analog power supply
• 48-pin LQFP small footprint package

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The two Channel Codec Filter PEB 2265 IOM-2 – SICOFI-2 is the logic continuation of a well-established family of Siemens Codec-Filter-ICs.
The IOM-2 – SICOFI-2 is a fully integrated PCM codec and filter fabricated in low power 1 mm CMOS technology for applications in digital communication systems.
Based on an advanced digital filter concept, the PEB 2265 provides excellent transmission performance and high flexibility.
The new filter concept (second generation) lends to a maximum of independence between the different filter blocks.
Each filter block can be seen like an one to one representative of the corresponding network element.
Only very few external components are needed, to complete the functionality of the IOM-2 – SICOFI-2.
The internal level accuracy is based on a very accurate bandgap reference.
The frequency behavior is mainly determined by digital filters, which do not have any fluctuations.
As a result of the new ADC and DAC concepts linearity is only limited by second order parasitic effects.
Although the device works with only one single 5-V supply there is a very good dynamic range available.

• Single chip CODEC and FILTER to handle two CO- or PABX-channels
• Specification according to relevant CCITT, EIA and LSSGR recommendations
• Digital signal processing technique
• Programmable interface optimized to current feed SLICs and transformer solutions
• Four pin serial IOM-2 Interface
• Single power supply 5 V
• Advanced low power 1mm analog CMOS technology
• Standard 64-pin P-MQFP-64 package
• High performance Analog to Digital Conversion
• High performance Digital to Analog Conversion
• Programmable digital filters to adapt the transmission behavior especially for
– AC impedance matching
– transhybrid balancing
– frequency response
– gain
• Advanced test capabilities
– all digital pins can be tested within a boundary scan scheme (IEEE 1149.1)
– five digital loops
– four analog loops
– two programmable tone generators per channel
• Comprehensive development platform available
– software for automatic filter coefficient calculation – QSICOS
– Hardware development board – STUT 2465

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