• Access time: 70ns
• Simple byte and page write
—Single 5V supply
—No external high voltages or VPP control circuits
—No erase before write
—No complex programming algorithms
—No overerase problem
• Low power CMOS
—Active: 60mA
—Standby: 500µA
• Software data protection
—Protects data against system level inadvertent writes
• High speed page write capability
• Highly reliable Direct Write™ cell
—Endurance: 1,000,000 cycles
—Data retention: 100 years
• Early end of write detection
—DATA polling
—Toggle bit polling
• Pb-free plus anneal available (RoHS compliant)

 The X28HC256 is a second generation high performance CMOS 32K x 8 EEPROM. It is fabricated with Intersil’s proprietary, textured poly floating gate technology, providing a highly reliable 5 Volt only nonvolatile memory.

 The X28HC256 supports a 128-byte page write operation, effectively providing a 24µs/byte write cycle, and enabling the entire memory to be typically rewritten in less than 0.8 seconds. The X28HC256 also features DATA Polling and Toggle Bit Polling, two methods of providing early end of write detection. The X28HC256 also supports the JEDEC standard Software Data Protection feature for protecting against inadvertent writes during power-up and power-down.
Endurance for the X28HC256 is specified as a minimum 1,000,000 write cycles per byte and an inherent data retention of 100 years.

X28HC256S-12 X28HC256SZ-12 X28HC256SI-12 X28HC256SIZ-12 X28HC256SM-12
X28HC256D-90 X28HC256DI-90 X28HC256DM-90 X28HC256DMB X28HC256EM-90
X28HC256EMB X28HC256FI-90 X28HC256FM-90 X28HC256FMB-90 X28HC256J-90
X28HC256JZ-90 X28HC256JI-90 X28HC256JIZ-90 X28HC256JM-90 X28HC256KM-90
X28HC256KMB X28HC256P-90 X28HC256PZ-90 X28HC256PI-90 X28HC256PIZ-90
X28HC256S-90 X28HC256SI-90 X28HC256SIZ-90
TAG byte, EEPROM, Volt

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• Utilizes the AVR® RISC Architecture

• High-performance and Low-power 8-bit RISC Architecture
– 90 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Up to 8 MIPS Throughput at 8 MHz

• Nonvolatile Program and Data Memory
– 1K Byte of Flash Program Memory
   :In-System Programmable (ATtiny12)
    Endurance: 1,000 Write/Erase Cycles (ATtiny11/12)
– 64 Bytes of In-System Programmable EEPROM Data Memory for ATtiny12
   :Endurance: 100,000 Write/Erase Cycles
– Programming Lock for Flash Program and EEPROM Data Security

• Peripheral Features
– Interrupt and Wake-up on Pin Change
– One 8-bit Timer/Counter with Separate Prescaler
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator

• Special Microcontroller Features
– Low-power Idle and Power-down Modes
– External and Internal Interrupt Sources
– In-System Programmable via SPI Port (ATtiny12)
– Enhanced Power-on Reset Circuit (ATtiny12)
– Internal Calibrated RC Oscillator (ATtiny12)

• Specification
– Low-power, High-speed CMOS Process Technology
– Fully Static Operation

• Power Consumption at 4 MHz, 3V, 25°C
– Active: 2.2 mA
– Idle Mode: 0.5 mA
– Power-down Mode: <1 µA

• Packages
– 8-pin PDIP and SOIC

• Operating Voltages
– 1.8 - 5.5V for ATtiny12V-1
– 2.7 - 5.5V for ATtiny11L-2 and ATtiny12L-4
– 4.0 - 5.5V for ATtiny11-6 and ATtiny12-8

• Speed Grades
– 0 - 1.2 MHz (ATtiny12V-1)
– 0 - 2 MHz (ATtiny11L-2)
– 0 - 4 MHz (ATtiny12L-4)
– 0 - 6 MHz (ATtiny11-6)
– 0 - 8 MHz (ATtiny12-8)

ATtiny11L ATtiny11 ATtiny12V ATtiny12L ATtiny12

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