General description
The HEF4020B is a 14-stage binary counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0, and Q3 to Q13). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the state of CP. Each counter stage is a static toggle flip-flop. A feature of the device is its high speed (typ. 35 MHz at VDD = 15 V).
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. It is also suitable for use over the full industrial (-40 °C to +85 °C) temperature range.

Features
*High speed operation
*Fully static operation
*5 V, 10 V, and 15 V parametric ratings
*Standardized symmetrical output characteristics
*Operates across the full industrial temperature range -40 °C to +85 °C
*Complies with JEDEC standard JESD 13-B
*ESD protection:
-HBM JESD22-A114E exceeds 2000 V
-MM JESD22-A115-A exceeds 200 V

Applications
*Industrial

HEF4020BP, HEF4020BT

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The SN54/74LS90, SN54/74LS92 and SN54/74LS93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide- by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or divide-by-eight (LS93) section which are triggered by a HIGH-to-LOW transition on the clock inputs. Each section can be used separately or tied together Q to CP) to form BCD, bi-quinary, modulo-12, or modulo-16 counters. All of the counters have a 2-input gated Master Reset (Clear), and the LS90 also has a 2-input gated Master Set (Preset 9).


* Low Power Consumption . . . Typically 45 mW
* High Count Rates . . . Typically 42 MHz
* Choice of Counting Modes . . . BCD, Bi-Quinary, Divide-by-Twelve, Binary
* Input Clamp Diodes Limit High Speed Termination Effects

SN54LS90 SN74LS90 SN54LS92 SN74LS92 SN54LS93 SN74LS93

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