General Description
The HMC398QS16G & HMC398QS16GE are single chip GaAs InGaP Heterojunction Bipolar Transistor (HBT) MMIC VCOs. The HMC398QS16G & HMC398QS16GE integrate resonators, negative resistance devices, varactor diodes and divide-by-8 prescalers. The VCO’s phase noise performance is excellent over temperature, shock, and process due to the oscillator’s monolithic structure. Power output is +7 dBm typical from a 5V supply voltage. The voltage controlled oscillator is packaged in a low cost, surface mount 16 leaded QSOP package with an exposed base for improved RF and thermal performance. The HMC398QS16G & HMC398QS16GE require no external components

Features
*Pout: +7 dBm
*Phase Noise: -105 dBc/Hz @100 KHz Typ.
*No External Resonator Needed
*Single Supply: 5V @ 325 mA
*QSOP16G SMT Package

Typical Applications
Low noise MMIC VCO w/Divide-by-8 for Ku-Band applications such as:
*Point-to-Point Radios
*Point-to-Multi-Point Radios / LMDS
*VSAT

398QS16GE

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GENERAL DESCRIPTION
The ADF4350 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external loop filter and external reference frequency.
The ADF4350 has an integrated voltage controlled oscillator (VCO) with a fundamental output frequency ranging from 2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16 circuits allow the user to generate RF output frequencies as low as 137.5 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin- and software-controllable. An auxiliary RF output is also available, which can be powered down if not in use.
Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V and can be powered down when not in use.

FEATURES
*Output frequency range: 137.5 MHz to 4400 MHz
*Fractional-N synthesizer and integer-N synthesizer
*Low phase noise VCO
*Programmable divide-by-1/-2/-4/-8/-16 output
*Typical rms jitter: 0.5 ps rms
*Power supply: 3.0 V to 3.6 V
*Logic compatibility: 1.8 V
*Programmable dual-modulus prescaler of 4/5 or 8/9
*Programmable output power level
*RF output mute function
*3-wire serial interface
*Analog and digital lock detect
*Switched bandwidth fast-lock mode
*Cycle slip reduction

APPLICATIONS
*Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT)
*Test equipment
*Wireless LANs, CATV equipment
*Clock generation

ADF4350BCPZ, ADF4350BCPZ-RL, ADF4350BCPZ-RL7, EVAL-ADF4350EB1Z

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Features
* Dual RF synthesizers
* RF1: 2.3 GHz to 2.6 GHz
* RF2: 750 MHz to 1.7 GHz
* IF synthesizer
* IF: 62.5 MHz to 1.0 GHz
* Integrated VCOs, loop filters, dividers, and phase detectors
* Minimal external components
* Continuous operation over a wide temperature range
* Fast settling time: 200 μsec
* Low phase noise
* 5 μA standby current
* 28-lead MLP, 5 x 5 mm

Applications
* Single-mode W-CDMA wireless handsets, terminals, and modems
* Dual-mode GSM/UMTS wireless handsets, terminals, and modems

Description
The Si4133W is a monolithic integrated circuit that performs RF and IF synthesis for GSM/GPRS and W-CDMA wireless communications. In dualmode GSM/UMTS handsets, the Si4133W meets demanding requirements for very low phase noise and fast settling time for both modes. The Si4133W integrates three complete phase-locked loops (PLLs) on a single die including VCOs, loop filters, reference and VCO dividers, and phase detectors. Dividers and powerdown settings are programmable through a three-wire serial interface.

Si4133W-BM

TAG CDMA, GSM, RF, VCO

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GENERAL DESCRIPTION
The 74HC/HCT4046A are high-speed Si-gate CMOS devices and are pin compatible with the “4046” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT4046A are phase-locked-loop circuits that comprise a linear voltage-controlled oscillator (VCO) and three different phase comparators (PC1, PC2 and PC3) with a common signal input amplifier and a common comparator input. The signal input can be directly coupled to large voltage signals, or indirectly coupled (with a series capacitor) to small voltage signals. A self-bias input circuit keeps small voltage signals within the linear region of the input amplifiers. With a passive low-pass filter, the “4046A” forms a second-order loop PLL. The excellent VCO linearity is achieved by the use of linear op-amp techniques. The VCO requires one external capacitor C1 (between C1A and C1B) and one external resistor R1 (between R1 and GND) or two external resistors R1 and R2 (between R1 and GND, and R2 and GND). Resistor R1 and capacitor C1 determine the frequency range of the VCO. Resistor R2 enables the VCO to have a frequency offset if required. The high input impedance of the VCO simplifies the design of low-pass filters by giving the designer a wide choice of resistor/capacitor ranges. In order not to load the low-pass filter, a demodulator output of the VCO input voltage is
provided at pin 10 (DEMOUT). In contrast to conventional techniques where the DEMOUT voltage is one threshold voltage lower than the VCO input voltage, here the DEMOUT voltage equals that of the VCO input. If DEMOUT is used, a load resistor (RS) should be connected
from DEMOUT to GND; if unused, DEMOUT should be left open. The VCO output (VCOOUT) can be connected directly to the comparator input (COMPIN), or connected via a frequency-divider. The VCO output signal has a duty factor of 50% (maximum expected deviation 1%), if the
VCO input is held at a constant DC level. A LOW level at the inhibit input (INH) enables the VCO and demodulator, while a HIGH level turns both off to minimize standby power consumption.
The only difference between the HC and HCT versions is the input level specification of the INH input. This input disables the VCO section. The sections of the comparator are identical, so that there is no difference in the SIGIN (pin 14) or COMPIN (pin 3) inputs between the HC and HCT versions. Phase comparators The signal input (SIGIN) can be directly coupled to the self-biasing amplifier at pin 14, provided that the signal swing is between the standard HC family input logic levels. Capacitive coupling is required for signals with smaller

FEATURES
· Low power consumption
· Centre frequency of up to 17 MHz (typ.) at VCC = 4.5 V
· Choice of three phase comparators: EXCLUSIVE-OR;
  edge-triggered JK flip-flop;
  edge-triggered RS flip-flop
· Excellent VCO frequency linearity
· VCO-inhibit control for ON/OFF keying and for low standby power consumption
· Minimal frequency drift
· Operating power supply voltage range: VCO section 3.0 to 6.0 V digital section 2.0 to 6.0 V
· Zero voltage offset due to op-amp buffering
· Output capability: standard
· ICC category: MSI.

74HCT4046A 74HC4046A
TAG VCO

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