General Description
CY25561 is a spread spectrum clock generator (SSCG) IC used to reduce electromagnetic Interference (EMI) found in today’s high speed digital electronic systems.
CY25561 uses a Cypress proprietary Phase Locked Loop (PLL) and Spread Spectrum Clock (SSC) technology to synthesize and frequency modulate the input frequency of the reference clock. By doing this, the measured EMI at the fundamental and harmonic frequencies of clock (SSCLK) is reduced.
This reduction in radiated energy can significantly reduce the cost of complying with regulatory requirements and time to market without degrading the system performance.
CY25561 is a very simple and versatile device to use. The frequency and spread percentage range is selected by programming S0 and S1 digital inputs. These inputs use three logic states including high (H), low (L), and middle (M) logic levels to select one of the nine available spread percentage ranges. Refer to Table 2 for programming details.
CY25561 is intended for use with applications with a reference frequency in the range of 50 to 166 MHz.
A wide range of digitally selectable spread percentages is made possible by using tri-level (high, low, and middle) logic at the S0 and S1 digital control inputs.
The output spread (frequency modulation) is symmetrically centered on the input frequency.
Spread spectrum clock control (SSCC) function enables or disables the frequency spread and is provided for easy comparison of system performance during EMI testing.
CY25561 is available in an eight-pin SOIC package with a 0°C to 70°C operating temperature range.

*50 to 166 MHz Operating Frequency Range
*Wide Range of Spread Selections:9
*Accepts Clock and Crystal Inputs
*Low Power Dissipation
-70 mW–Typ at 66 MHz
*Frequency Spread Disable Function
*Center Spread Modulation
*Low Cycle-to-cycle Jitter
*8-pin SOIC Package

*Desktop, notebook, and tablet PCs
*VGA controllers
*LCD panels and monitors
*Workstations and servers

CY25561SXC, CY25561SXCT

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MB88154 is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. It corresponds to both of the center spread which modulates input frequency as Middle Centered and down spread which modulates so as not to exceed input frequency.

*Input frequency : 16.6 MHz to 67 MHz
*Output frequency: 16.6 MHz to 67 MHz (One time input frequency)
*Modulation rate can select from ± 0.5%, ± 1.0%, ± 1.5% or − 1.0%, − 2.0%, − 3.0%. (For center spread / down spread.)
*Equipped with crystal oscillation circuit: Range of oscillation 16.6 M MHz to 48 MHz
*The external clock can be input: 16.6 MHz to 67 MHz
*Modulation clock output Duty : 40% to 60%
*Modulation clock Cycle-Cycle Jitter : Less than 100 ps
*Low current consumption by CMOS process : 5.0 mA (24 MHz : Typ-sample, no load)
*Power supply voltage : 3.3 V ± 0.3 V
*Operating temperature : − 40 °C to +85 °C
*Package : SOP 8-pin

MB88154-102, MB88154-103, MB88154-112, MB88154-113

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* Compliant with Intel® CK-Titan Clock Synthesizer/Driver Specifications
* Multiple output clocks at different frequencies
* Three pairs of differential CPU outputs, up to 200 MHz
* Ten synchronous PCI clocks, three free-running
* Six 3V66 clocks
* Two 48-MHz clocks
* One reference clock at 14.318 MHz
* One VCH clock
* Spread Spectrum clocking (down spread)
* Power-down features (PCI_STOP#, CPU_STOP# PWR_DWN#)
* Three Select inputs (Mode select & IC Frequency Select)
* OE and Test Mode support
* 56-pin SSOP package and 56-pin TSSOP package

* Supports next-generation Pentium® processors using differential clock drivers
* Motherboard clock generator
* Support Multiple CPUs and a chipset
* Support for PCI slots and chipset
* Supports AGP, DRCG reference and Hub Link
* Supports USB host controller and graphic controller
* Supports ISA slots and I/O chip
* Enables reduction of electromagnetic interference (EMI) and overall system cost
* Enables ACPI-compliant designs
* Supports up to four CPU clock frequencies
* Enables ATE and “bed of nails” testing
* Widely available, standard package enables lower cost


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