GENERAL DESCRIPTION
The S2042 and S2043 transmitter and receiver pair are designed to perform high-speed serial data transmission over fiber optic or coaxial cable interfaces conforming to the requirements of the ANSI X3T11 Fibre Channel specification. The chipset is selectable to 1062, 531 or 266 Mbit/s data rates with associated 10- or 20-bit data word.
The chipset performs parallel-to-serial and serial-toparallel conversion and framing for block-encoded data. The S2042 on-chip PLL synthesizes the highspeed clock from a low-speed reference. The S2043 on-chip PLL synchronizes directly to incoming digital signals to receive the data stream. The transmitter and receiver each support differential PECL-compatible I/O for fiber optic component interfaces, to minimize crosstalk and maximize data integrity. Local loopback allows for system diagnostics. The TTL I/O section can operate from either a +3.3V or a +5V power supply. With a 3.3V power supply the chipset dissipates only 1W typically.
Figure 1 shows a typical network configuration incorporating the chipset. The chipset is compatible with AMCC’s S2036 Open Fiber Control (OFC) device.

FEATURES
*Functionally compliant with ANSI X3T11 Fibre Channel physical and transmission protocol standards
*S2042 transmitter incorporates phase-locked loop (PLL) providing clock synthesis from low-speed reference
*S2043 receiver PLL configured for clock and data recovery
*1062, 531 and 266 Mb/s operation
*10- or 20-bit parallel TTL compatible interface
*1 watt typical power dissipation for chipset
*+3.3/+5V power supply
*Low-jitter serial PECL compatible interface
*Lock detect
*Local loopback
*10mm x 10mm 52 PQFP package
*Fibre Channel framing performed by receiver
*Continuous downstream clocking from receiver
*TTL compatible outputs possible with +5V I/O power supply

APPLICATIONS
High-speed data communications
*Supercomputer/Mainframe
*Workstation
*Switched networks
*Proprietary extended backplanes
*Mass storage devices/RAID drives

S2043, S2042B-10, S2043B-10

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DESCRIPTION
The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and outputs differential PECL clock and retimed data signals.
The GS9035A can operate in either auto or manual rate selection mode. In auto mode the GS9035A is ideal for multi-rate serial data protocols such as SMPTE 259M. In this mode the GS9035A automatically detects and locks onto the incoming data signal. For single rate data systems, the GS9035A can be configured to operate in manual mode. In both modes, the GS9035A requires only one external resistor to set the VCO centre frequency and provides adjustment-free operation.
The GS9035A has dedicated pins to indicate LOCK and data rate. In addition, an internal muting function forces the serial data outputs to a static state when input data is not present or when the PLL is not locked. The serial clock outputs can also be disabled resulting in a 10% power savings.
The GS9035A is packaged in a 28 pin PLCC and operates from a single +5 or -5 volt power supply.

FEATURES
*adjustment-free operation
*auto-rate selection for 5 SMPTE data rates: 143, 177, 270, 360, 540Mb/s
*data rate indication output
*serial data output mute when PLL is not locked
*immune to harmonic locking
*operation independent of SAV/EAV sync signals
*low jitter, low power
*single external VCO resistor for operation with five input data rates
*large input jitter tolerance: typically 0.45 UI beyond loop bandwidth
*power savings mode (output serial clock disable)
*system friendly: serial clock remains active when data outputs muted
*robust lock detect
*Pb-free and Green

APPLICATIONS
The GS9035A is used for Clock and Data recovery, and Jitter elimination for all high speed serial digital interface applications involving SMPTE 259M and other data standards.

GS9035ACPJ, GS9035ACTJ, GS9035ACPJE3, GS9035ACTJE3

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General Description
The LXT9782 is an eight-port PHY Fast Ethernet Transceiver that supports IEEE 802.3 physical layer applications at both 10 and 100 Mbps. The LXT9762 offers the same features and functionality in a six-port device. This data sheet uses the singular designation “LXT97x2” to refer to both devices.
The LXT97x2 interfaces multiple Serial Media Independent Interface (SMII) compliant controllers to 10BASE-T and/or 100BASE-TX media.
All network ports provide a combination twisted-pair (TP) or pseudo-ECL (PECL) interface for a 10/100BASE-TX or 100BASE-FX connection.
The LXT97x2 provides three discrete LED drivers for each port, and eight global serial LED outputs. It supports both half- and full-duplex operation at 10 and 100 Mbps and requires only a single 3.3V power supply.

Product Features
*Multiple independent IEEE 802.3-compliant 10/100 ports with integrated filters
*Proprietary Optimal Signal Processing (OSP™) design improves SNR by 3 dB over ideal analog filters
*Robust baseline wander correction for improved 100BASE-TX performance
*100BASE-FX fiber-optic capability on all ports
*Supports both auto-negotiation and legacy systems without auto-negotiation capability
*JTAG boundary scan
*Multiple Serial MII (SMII) ports for independent PHY port operation
*Configurable via MDIO port or external control pins
*Maskable interrupts
*Very low power consumption (400 mW per port, typical)
*3.3V operation
*208-pin PQFP and 272-lead BGA
*0-70oC ambient temperature range

Application
*100BASE-T, 10/100-TX, or 100BASE-FX Switches and multi-port NICs.

LXT9782

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General Description
The TC74 is a serially accessible, digital temperature sensor particularly suited for low cost and small formfactor applications. Temperature data is converted from the onboard thermal sensing element and made available as an 8-bit digital word.
Communication with the TC74 is accomplished via a 2-wire SMBus/I2C compatible serial port. This bus also can be used to implement multi-drop/multi-zone monitoring. The SHDN bit in the CONFIG register can be used to activate the low power Standby mode.
Temperature resolution is 1°C. Conversion rate is a nominal 8 samples/sec. During normal operation, the quiescent current is 200 μA (typ). During standby operation, the quiescent current is 5 μA (typ).
Small size, low installed cost and ease of use make the TC74 an ideal choice for implementing thermal management in a variety of systems.

Features
*Digital Temperature Sensing in SOT-23-5 or TO-220 Packages
*Outputs Temperature as an 8-Bit Digital Word
*Simple SMBus/I2C™ Serial Port Interface
*Solid-State Temperature Sensing:
 ±2°C (max.) Accuracy from +25°C to +85°C
 ±3°C (max.) Accuracy from 0°C to +125°C
*Supply Voltage of 2.7V to 5.5V
*Low Power:
 200 μA (typ.) Operating Current
 5 μA (typ.) Standby Mode Current

Applications
*Thermal Protection for Hard Disk Drives and other PC Peripherals
*PC Card Devices for Notebook Computers
*Low Cost Thermostat Controls
*Power Supplies
*Thermistor Replacement

TC74A0-3.3VCT, TC74A1-3.3VCT, TC74A2-3.3VCT, TC74A3-3.3VCT,
TC74A4-3.3VCT, TC74A5-3.3VCT, TC74A6-3.3VCT, TC74A7-3.3VCT

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Description
The AT24C128B provides 131,072 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 packages. In addition, the entire family is available in a 1.8V (5.5V to 3.6V)
version.

Features
*Low-voltage and Standard-voltage Operation
*1.8 (VCC = 1.8V to 5.5V)
*Internally Organized as 16,384 x 8
*Two-wire Serial Interface
*Schmitt Trigger, Filtered Inputs for Noise Suppression
*Bidirectional Data Transfer Protocol
*1 MHz (5.5V, 2.5V), and 400 kHz (1.8V) Compatibility
*Write Protect Pin for Hardware and Software Data Protection
*64-byte Page Write Mode (Partial Page Writes Allowed)
*Self-timed Write Cycle (5 ms Max)
*High Reliability
*Endurance: One Million Write Cycles
*Data Retention: 40 Years
*Lead-free/Halogen-free
*8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 Packages
*Die Sales: Wafer Form, Tape and Reel and Bumped Wafers

AT24C128B-PU, AT24C128BN-SH-B, AT24C128BN-SH-T, AT24C128B-TH-B, AT24C128B-TH-T, AT24C128BY6-YH-T, AT24C128BD3-DH-T, AT24C128BU2-UU-T, AT24C128B-W-11
TAG EEPROM, Serial

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Description
 The Microchip Technology Inc.
24AA01/24LC01B (24XX01*) is a 1 Kbit Electrically Erasable PROM.
The device is organized as one block of 128 x 8-bit memory with a 2-wire serial interface.
Low-voltage design permits operation down to 1.7V with standby and active currents of only 1 μA and 1 mA, respectively.
The 24XX01 also has a page write capability for up to 8 bytes of data.
The 24XX01 is available in the standard 8-pin PDIP, surface mount SOIC, TSSOP, 2x3 DFN and MSOP packages, and is also available in the 5-lead SOT-23 package.

Features
* Single supply with operation down to 1.7V for 24AAXX devices, 2.5V for 24LCXX devices
* Low-power CMOS technology:
- Read current 1 mA, typical
- Standby current 1 μA, typical (I-temp)
* 2-wire serial interface, I2C™ compatible
* Schmitt Trigger inputs for noise suppression
* Output slope control to eliminate ground bounce
* 100 kHz and 400 kHz compatibility
* Page write time 3 ms, typical
* Hardware write-protect
* ESD protection >4,000V
* More than 1 million erase/write cycles
* Data retention >200 years
* Factory programmable available
* Packages include 8-lead PDIP, SOIC, TSSOP, DFN, MSOP and 5-lead SOT-23
* Pb-free and RoHS compliant
* Temperature ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C

24AA01
24AA01T
24LC01B
24LC01BT

TAG EEPROM, Serial

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OVERVIEW
 The TMC 24A01/24A02/24A04/24A08/24A16 serial EEPROM has a 1,024/2,048/4,096/8,192/16,384-bit capacity, supporting the standard I2C™-bus serial interface. It is fabricated using TMC’s most advanced CMOS technology.
It has been developed for low power and low voltage applications (1.8 V to 5.5 V). One of its major feature is a hardware-based write protection circuit for the entire memory area.
Hardware-based write protection is controlled by the state of the write-protect (WP) pin.
Using one-page write mode, you can load up to 16 bytes of data into the EEPROM in a single write operation.
Another significant feature of the TMC 24A01/24A02/24A08/24A16 is its support for fast mode and standard mode.

FEATURES
I2C-Bus Interface
* Two-wire serial interface
* Automatic word address increment
EEPROM
* 1K/2K/4K/8K/16K-bit (128/256/512/1,024/2,048-byte) storage area
* 16-byte page buffer
* Hardware-based write protection for the entire EEPROM (using the WP pin)
* EEPROM programming voltage generated on chip
* 1,000,000 erase/write cycles
* 100 years data retention
Operating Characteristics
* Operating voltage
- 1.8 V to 5.5 V
* Operating current
- Maximum write current: < 3 mA at 5.5 V
- Maximum read current: < 200 mA at 5.5 V
- Maximum stand-by current: < 5 mA at 5.5 V
* Operating temperature range
- –25°C to + 70°C (commercial)
- –40°C to + 85°C (industrial)
* Operating clock frequencies
- 100 kHz at standard mode
- 400 kHz at fast mode
* Electrostatic discharge (ESD)
- 5,000 V (HBM)
- 500 V (MM)

24A01
24A02
24A04
24A08
24A16

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X24C02 - Serial E2PROM

ETC 2007/04/10 15:59
FEATURES
• 2.7V to 5.5V Power Supply
• Low Power CMOS
—Active Current Less Than 1 mA
—Standby Current Less Than 50 mA
• Internally Organized 256 x 8
• Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
• 2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
• Four Byte Page Write Operation
—Minimizes Total Write Time Per Byte
• High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
• New Hardwire—Write Control Function

DESCRIPTION
 The X24C02 is CMOS a 2048 bit serial E2PROM, internally organized 256 x 8. The X24C02 features a serial interface and software protocol allowing operation on a simple two wire bus. Three address inputs allow up to eight devices to share a common two wire bus.
 Xicor E2PROMs are designed and tested for applications requiring extended endurance. Inherent data retention is greater than 100 years. Available in DIP, MSOP and SOIC packages.

X24C02P X24C02S8 X24C02M X24C02PI X24C02S8I X24C02MI X24C02PM X24C02S8M
X24C02MM X24C02P-3.5 X24C02S8-3.5 X24C02M-3.5 X24C02PI-3.5 X24C02S8I-3.5
X24C02MI-3.5 X24C02PM-3.5 X24C02S8M-3.5 X24C02MM-3.5 X24C02P-3 X24C02S8-3
X24C02M-3 X24C02PI-3 X24C02S8I-3 X24C02MI-3 X24C02PM-3 X24C02S8M-3 X24C02MM-3
X24C02P-2.7 X24C02S8-2.7 X24C02M-2.7 X24C02PI-2.7 X24C02S8I-2.7 X24C02MI-2.7
X24C02PM-2.7 X24C02S8M-2.7 X24C02MM-2.7
TAG Serial

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FEATURES
• Single supply with programming operation down to 1.8V
• Low power CMOS technology
   - 70uA typical active READ current at 1.8V
   - 2uA typical standby current at 1.8V
• ORG pin selectable memory configuration
   - 128 x 8- or 64 x 16-bit organization (93AA46)
   - 256 x 8- or 128 x 16-bit organization (93AA56)
   - 512 x 8 or 256 x 16 bit organization (93AA66)
• Self-timed ERASE and WRITE cycles (including auto-erase)
• Automatic ERAL before WRAL
• Power on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device status signal during ERASE/WRITE cycles
• Sequential READ function
• 10,000,000 ERASE/WRITE cycles guaranteed on 93AA56 and 93AA66
• 1,000,000 E/W cycles guaranteed on 93AA46
• Data retention > 200 years
• 8-pin PDIP/SOIC (SOIC in JEDEC and EIAJ standards)
• Temperature ranges supported
- Commercial (C): 0°C to +70°C

DESCRIPTION
 The Microchip Technology Inc. 93AA46/56/66 are 1K, 2K and 4K low voltage serial Electrically Erasable PROMs. The device memory is configured as x8 or x16 bits depending on the ORG pin setup. Advanced CMOS technology makes these devices ideal for low power non-volatile memory applications.
 The 93AA Series is available in standard 8-pin DIP and surface mount SOIC packages. The rotated pin-out 93AA46X/ 56X/66X are offered in the “SN” package only.

93AA46 93AA56 93AA66

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Features
• Write Protect Pin for Hardware Data Protection
– Utilizes Different Array Protection Compared to the AT24C02/04/08
• Low Voltage and Standard Voltage Operation
   – 5.0 (VCC = 4.5V to 5.5V)
   – 2.7 (VCC = 2.7V to 5.5V)
   – 2.5 (VCC = 2.5V to 5.5V)
   – 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 256 x 8 (2K), 512 x 8 (4K) or 1024 x 8 (8K)
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Supperssion
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
• 8-Byte Page (2K), 16-Byte Page (4K, 8K) Write Modes
• Partial Page Writes Are Allowed
• Self-Timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >3000V
• Automotive Grade and Extended Temperature Devices Available
• 8-Pin and 14-Pin JEDEC SOIC, 8-Pin PDIP, and 8-Pin TSSOP Packages

Description
The AT24C02A/04A/08A provides 2048/4096/8192 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 256/512/1024 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C02A/04A/08A is available in space saving 8-pin PDIP, 8-pin, 14-pin SOIC, and 8-pin TSSOP packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to 5.5V) and 1.8V (1.8V to 5.5V) versions.

AT24C02A AT24C04A AT24C08A

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