Features
• 5 MHz to 4 GHz Overall Operating Frequency Range
• 40-400 MHz LOmod range
• 2.7 - 5.5 V Operation (3 V, 25 mA)
• Differential High Impedance i, q Inputs
• On-Chip Linear RC Phase Shifter
• -23 dBm Modulator S.E. Output Power into 50 W at 150 MHz
• -15 dBm Linear (-11 dBm Saturated) Mixer Output Power into 50 W at 1900 MHz
• Mixer Can Be Used for Up/Down Conversion or Disabled (3 V, 10 mA)
• Standby Mode (<1 mA)
• JEDEC Standard SSOP-16 Surface Mount Package

Applications
• NADC, PDC, GSM Handsets and Base Stations
• PCS Handsets and Base Stations
• DLMR Handsets
• CDPD Radios
• ISM Band Wireless Links

General Description
 The HPMX-2007 vector modulator/mixer IC is designed to meet the needs of cellular and
PCS telephone applications. The heart of the IC is a vector (or quadrature) modulator followed
by a Gilbert cell mixer. The modulator and mixer can be used together, drawing only 25 mA from a 3.0 volt supply. The mixer can be disabled by connecting either LOmix or LOmix to VCC, allowing operation of the modulator alone and reducing current drain to only 10 mA.
 The i and q signal inputs are balanced to insure high common mode noise rejection. The output of the mixer is a differential pair of open collectors. One collector can be connected to VCC and the other matched to 50 W using a shunt L, series C network. Alternatively, the output can be matched to 50 W through a 4:1 balun.
 The SSOP-16 package insures that the IC occupies a minimal amount of printed circuit board space. The HPMX-2007 is manufactured using Hewlett-Packard’s 30 GHz ISOSAT-II process which combines stepper lithography, self alignment, ion implantation techniques and gold metallization to produce state-of-the-art RFICs.

HPMX-2007-BLK HPMX-2007-TR1

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The SG3525A, SG3527A pulse width modulator control circuits offer improved performance and lower external parts count when implemented for controlling all types of switching power supplies. The on–chip +5.1 V reference is trimmed to ±1% and the error amplifier has an input
common–mode voltage range that includes the reference voltage, thus eliminating the need for external divider resistors. A sync input to the oscillator enables multiple units to be slaved or a single unit to be synchronized to an external system clock. A wide range of deadtime can be
programmed by a single resistor connected between the CT and Discharge pins. These devices also feature built–in soft–start circuitry, requiring only an external timing capacitor. A shutdown pin controls both the soft–start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft–start recycle with longer shutdown commands. The under voltage lockout inhibits the outputs and the
changing of the soft–start capacitor when VCC is below nominal. The output stages are totem–pole design capable of sinking and sourcing in excess of 200 mA. The output stage of the SG3525A features NOR logic resulting in a low output for an off–state while the SG3527A utilized OR logic which gives a high output when off.

• 8.0 V to 35 V Operation
• 5.1 V ± 1.0% Trimmed Reference
• 100 Hz to 400 kHz Oscillator Range
• Separate Oscillator Sync Pin
• Adjustable Deadtime Control
• Input Undervoltage Lockout
• Latching PWM to Prevent Multiple Pulses
• Pulse–by–Pulse Shutdown
• Dual Source/Sink Outputs: ±400 mA Peak

SG3527A SG3525AN SG3525ADW SG3527AN

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DESCRIPTION
The SG3525A series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies.
The on-chip + 5.1 V reference is trimmed to ±1 %andthe input common-mode range of the error
amplifier includes the reference voltage eliminating external resistors. A sync input to the oscillator allows multiple units to beslaved or a single unit to be synchronized to an external systemclock. A single resistor between theCT and the discharge terminals provide a wide range of dead time ad-justment.
These devices also feature built-in soft-startc ircuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuity and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands.
These functions are also controlledby an under voltage lock out which keepsthe outputs off and the soft-start capacitor discharged for sub-normal input voltages.This lockout circuitry includes approximately 500mV of hysteresis for jitterfree operation. Another feature of these PWM circuits
is a latch following the comparator. Once a PWM pulses has been terminated for any reason,
the outputs will remain off for the durationof the period.
The latch is reset with each clock pulse. The output stages are totem-pole designs capable of
sourcing or sinking in excess of 200 mA. The SG3525A output stage features NOR logic, giving a
LOW output for an OFF state.

Feature
■ 8 TO 35 V OPERATION
■ 5.1 V REFERENCE TRIMMED TO ± 1%
■ 100 Hz TO 500 KHz OSCILLATORRANGE
■ SEPARATEOSCILLATORSYNC TERMINAL
■ ADJUSTABLE DEADTIMECONTROL
■ INTERNALSOFT-START
■ PULSE-BY-PULSESHUTDOWN
■ INPUT UNDERVOLTAGE LOCKOUT WITH HYSTERESIS
■ LATCHING PWM TO PREVENT MULTIPLE PULSES
■ DUAL SOURCE/SINK OUTPUT DRIVERS

SG2525A, SG3525A, SG2525AN, SG3525AN, SG2525AP, SG3525AP
TAG Modulator

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