Description
The Si533 dual frequency XO utilizes Silicon Laboratories’ advanced DSPLL® circuitry to provide a low jitter clock at high frequencies. The Si533 is available with any-rate output frequency from 10 to 945 MHz and select frequencies to 1400 MHz. Unlike a traditional XO, where a different crystal is required for each output frequency, the Si533 uses one fixed crystal to provide a wide range of output frequencies. This IC based approach allows the crystal resonator to provide exceptional frequency stability and reliability. In addition, DSPLL clock synthesis provides superior supply noise rejection, simplifying the task of generating low jitter clocks in noisy environments typically found in communication systems. The Si533 IC based XO is factory configurable for a wide variety of user specifications including frequency, supply voltage, output format, and temperature stability. Specific configurations are factory programmed at time of shipment, thereby eliminating long lead times associated with custom oscillators.

Features
*Available with any-rate output frequencies from 10 MHz to 945 MHz and select frequencies to 1.4 GHz
*2 selectable output frequencies
*3rd generation DSPLL® with superior jitter performance
*3x better frequency stability than SAW-based oscillators
*Pin 1 output enable (OE)
*Internal fixed crystal frequency ensures high reliability and low aging
*Available CMOS, LVPECL, LVDS, and CML outputs
*3.3, 2.5, and 1.8 V supply options
*Industry-standard 5 x 7 mm package and pinout
*Pb-free/RoHS-compliant

Applications
*SONET/SDH
*Networking
*SD/HD video
*Clock and data recovery
*FPGA/ASIC clock generation

SI533AA00100DGR, SI533BA00100DGR, SI533CA00100DGR, SI533DA00100DGR

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DESCRIPTION
The Fujitsu MB15F86UL is Fractional-N Phase Locked Loop (PLL) frequency synthesizer with fast lock up function.
The Fractional-N PLL operating up to 2500* MHz and the integer PLL operating up to 600 MHz are integrated on one chip.
The MB15F86UL is used, as charge pump which is well-balanced output current with 1.5 mA and 6 mA selectable by serial data, direct power save control and digital lock detector. In addition, the MB15F86UL adopts a new architecture to achieve fast lock.
The new package (Thin Bump Chip Carrier20) decreases a mount area of MB15F86UL more than 30% comparing with the former B.C.C.16 (for dual PLL, MB15F03SL) .
The MB15F86UL is ideally suited for wireless mobile communications, such as TDMA or CDMA.

FEATURES
*High frequency operation : RF synthesizer : 2500* MHz Max, IF synthesizer : 600 MHz Max
*Low power supply voltage : VCC = 2.7 V to 3.6 V
*Ultra Low power supply current : ICC = 5.8 mA Typ (VCC = Vp = 3.0 V, Ta = +25 °C, SW = 0 in IF and RF locking state)
*Direct power saving function : Power supply current in power saving mode Typ 0.1 mA (VCC = Vp = 3.0 V, Ta = +25 °C) , Max 10 mA (VCC = Vp = 3.0 V)
*Fractional function : modulo 3 to 16 programmable (implemented in RF-PLL)
*Dual modulus prescaler : 2500* MHz prescaler (16/17 or 32/33) /600 MHz prescaler (8/9 or 16/17)
*Serial input 14-bit programmable reference divider : R = (RF section 8 bit) 3 to 255, (IF section 14 bit) 3 to 16, 383
*Serial input programmable divider consisting of :
RF section- Binary 5-bit swallow counter : 0 to 31
-Binary 10-bit programmable counter : 18 to 1,023
-Binary 4-bit fractional counter numerator : 0 to 15
IF section - Binary 4-bit swallow counter : 0 to 15
-Binary 11-bit programmable counter : 3 to 2,047
*On-chip phase comparator for fast lock and low noise
*Operating temperature : Ta = -40 °C to +85 °C
*Small package Bump Chip Carrier.0 (3.4 mm ´ 3.6 mm ´ 0.6 mm)

MB15F86ULPFT, MB15F86ULPVA

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DESCRIPTION
The M2004-02 integrates a high performance Phase Locked Loop (PLL) with a Voltage Controlled SAW Oscillator (VCSO) to provide a low jitter Frequency Synthesizer in a 9mm x 9mm surface mount package.
The internal high “Q” SAW filter provides low jitter signal performance and determines the maximum output frequency of the VCSO.
A programmable output divider can divide the VCSO frequency to achieve an output as low as 38.88MHz.
The input to the Frequency Synthesizer is provided by selecting between a differential input clock or a single ended input clock.
The output frequency is an integer multiple of the input reference frequency. The multiplying factor is programmed via a 6 bit parallel address.
An external loop filter sets the PLL bandwidth which can be optimized to provide jitter attenuation of the input reference clock.
The bandwidth control, low phase noise, and HOLD features make the M2004-02 ideal for use as a clock jitter attenuator, frequency translator, and clock frequency generator in OC-3 through OC-192 applications.

FEATURES
*Output Clock Frequency up to 700MHz
*Internal Low-jitter SAW-based Oscillator
*Intrinsic Jitter <1ps rms (12kHz - 20MHz)
*Differential Input Compatible with LVPECL, LVDS, HSTL, SSTL, etc.
*Dual Input MUX
*Parallel Programming
*Tunable Loop Filter Response
*Differential LVPECL Outputs
*3.3V Operation
*Small 9mm x 9mm SMT Package

APPLICATIONS
*SONET / SDH / 10GbE System Synchronization
*Add / Drop Muxes, Access and Edge Switches
*Line Card System Clock Cleaner / Translator
*Optical Module Clock Cleaner / Translator

M2004-02-500.0000, M2004-02-622.0800, M2004-02-625.0000

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Description
The PI6C3503 is a Low Power Frequency Multiplier with Spread Spectrum function to reduce EMI interference. The PI6C3503 provides a 1 time Spread Spectrum modulated output from a single clock source or a crystal. The PI6C3503 can reduce EMI at the clock output and it allows signifi cant system cost savings by reducing the number of circuit board layers ferrite beads and shielding that are traditionally required to pass EMI regulations.
Power down control is selectable through external logic state setting. The various and small package outlines can save board size and is easy for layout.
The PI6C3503 can be used in most portable devices with low power requirements like PDA, DSC, MFP, Media player, portable-TV, and LCM(LCD Panel Module).
PI6C3503 is one of Pericom clock products, if you have application need with clock input or output not specifi ed here, please contact with Pericom for further information or custom clock design.

Features
*Produces a 1 time spread spectrum clock signal from the input frequency.
*2.5 V or 3.3V power supply operation.
*Input frequency range from 13MHz to 30MHz.
*Frequency Spreading Ratio : +1.15% (Typical @15MHz output frequency)
*Modulation Rate : Fin/640
*Low power consumption design
*6-pin SOT-23, 6-pin TDFN, 8-pin TSSOP, and 8-pin SOIC Packages.

PI6C3503TE, PI6C3503ZCE, PI6C3503WE, PI6C3503LE

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 The MTL5521 converts a frequency or rotational speed signal from a proximity detector located in the hazardous area into a 0/4–20mA current signal suitable for driving safe area loads.
 A display located on the top indicates the frequency. The analogue output provides either a 0–20mA or 4–20mA signal that is proportional to the rotational speed or frequency of the input.
A relay output is provided, with two configurable set points, allowing monitoring of the input frequency. When the input frequency is within this window the relay is energised and a yellow LED is illuminated. A start-up delay is triggered by a NO contact allowing the system to start up without creating false alarms.
 Configuration settings are made by two push button switches located on the front of the unit allowing the following parameters to be displayed and configured:

• Output current either 0–20mA or 4–20mA
• 0/4mA and 20mA frequency values
• Line fault detection: Off, wire-break and/or short circuit
• Upper and lower threshold values of the set point relay (including hysteresis)
• Start uptime delay 0 to 1000s
• Filter time constant
• Scaling factors

A line fault detect facility detects open and/or short circuits in the field. When a fault is detected the relay de-energises and the yellow LED changes to red.

MTL5521-11-230 MTL5521-11-115 MTL5521-11-24

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Applications
• General purpose RF systems
• Low bit rate wireless telemetry
• Instrumentation
• Specialized Mobile Radios (SMRs) and Private Mobile Radios (PMRs)

Features
• Spur-free operation
• 1.0 GHz maximum operating frequency
• 500 MHz maximum auxiliary synthesizer
• Ultra-small step size, 100 Hz or less
• High internal reference frequency enables large loop bandwidth implementations
• Very fast switching speed (e.g., below 100 µs)
• Phase noise to –96 dBc/Hz inside the loop filter bandwidth @ 950 MHz
• Software programmable power-down modes
• High-speed serial interface up to 100 Mbps
• Three-wire programming
• Programmable division ratios on reference frequency
• Phase detectors with programmable gain provide a programmable loop bandwidth
• Frequency power steering further enhances rapid acquistion time
• On-chip crystal oscillator
• Frequency adjust for temperature compensation
• Direct digital modulation
• 3 V operation
• 5 V output to loop filter
• 28-pin EP-TSSOP 6.4 x 9.7 mm package

Description
 Skyworks CX72301 direct digital modulation fractional-N frequency synthesizer provides ultra-fine frequency resolution, fast switching speed, and low phase-noise performance. This
synthesizer is a key building block for high-performance radio system designs that require low power and fine step size.
 
 The ultra-fine step size of less than 100 Hz allows this synthesizer to be used in very narrowband wireless applications. With proper temperature sensing or through control channels, the synthesizer’s fine step size can compensate for crystal oscillator or Intermediate Frequency (IF) filter drift. As a result, crystal oscillators or crystals can replace temperature- compensated or ovenized crystal oscillators, reducing parts count and associated component cost. The device’s fine step size can also be used for Doppler shift corrections.
 
 The CX72301 has a phase noise floor of –95 dBc/Hz up to 1.0 GHz operation as measured inside the loop bandwidth. This is permitted by the on-chip low noise dividers and low divide ratios provided by the device’s high fractionality. Reference crystals or oscillators up to 50 MHz can be used with the CX72301. The crystal frequency is divided down by independent programmable divider ratios of 1 to 32 for the main and auxiliary synthesizers. The phase detectors can operate at a maximum speed of 25 MHz, which allows better phase noise due
to the lower division value. With a high reference frequency, the loop bandwidths can also be increased. Larger loop bandwidths improve the settling times and reduce in-band phase noise.
Therefore, typical switching times of less than 100 µs can be achieved. The lower in-band phase noise also permits the use of lower cost Voltage Controlled Oscillators (VCOs) in customer applications.

 The CX72301 has a frequency power steering circuit that helps the loop filter steer the VCO when the frequency is too fast or too slow, further enhancing acquisition time. The unit operates with a three-wire, high-speed serial interface. A combination of a large bandwidth, fine resolution, and the threewire, high-speed serial interface allows for a direct frequency
modulation of the VCO. This supports any continuous phase, constant envelope modulation scheme such as Frequency Modulation (FM), Frequency Shift Keying (FSK), Minimum Shift
Keying (MSK), or Gaussian Minimum Shift Keying (GMSK). This capability can eliminate the need for In-Phase and Quadrature (I/Q) Digital-To-Analog Converters (DACs), quadrature
upconverters, and IF filters from the transmitter portion of the radio system.

CX72301-11 PH00-D102

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