The Microchip Technology Inc. 24AA128/24LC128/24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial Electrically Erasable PROM (EEPROM), capable of operation across a broad voltage range (1.7V to 5.5V). It has been developed for advanced, low-power applications such as personal communications or data acquisition. This device also has a page write capability of up to 64 bytes of data. This device is capable of both random and sequential reads up to the 128K boundary. Functional address lines allow up to eight devices on the same bus, for up to 1 Mbit address space. This device is available in the standard 8-pin plastic DIP, SOIC (3.90 mm and 5.28 mm), TSSOP, MSOP, DFN, and Chip Scale packages.

*Single Supply with Operation down to 1.7V for 24AA128/24FC128 devices, 2.5V for 24LC128 devices
*Low-Power CMOS Technology:
-Write current 3 mA, typical
-Standby current 100 nA, typical
*2-Wire Serial Interface, I2C™ Compatible
*Cascadable up to Eight Devices
*Schmitt Trigger Inputs for Noise Suppression
*Output Slope Control to Eliminate Ground Bounce
*100 kHz and 400 kHz Clock Compatibility
*1 MHz Clock for FC Versions
*Page Write Time 5 ms, typical
*Self-Timed Erase/Write Cycle
*64-Byte Page Write Buffer <adjust per device>
*Hardware Write-Protect
*ESD Protection >4000V
*More than 1 Million Erase/Write Cycles
*Data Retention > 200 years
*Factory Programming Available
*Packages include 8-lead PDIP, SOIC, TSSOP, DFN, MSOP, and Chip Scale Packages
*Pb-Free and RoHS Compliant
*Temperature Ranges:
- Industrial (I): -40°C to +85°C
- Automotive (E): -40°C to +125°C

24AA128, 24AA128T, 24LC128, 24LC128T, 24FC128, 24FC128T

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Product Description
Peregrine’s PE3342 is a high performance integer-N PLL with embedded EEPROM capable of frequency synthesis up to 2700 MHz with a speed-grade option to 3000 MHz. The EEPROM allows designers to permanently store control bits, allowing easy configuration of self-starting synthesizers. The superior phase noise performance of the PE3342 is ideal for applications such as wireless base stations, fixed wireless, and RF instrumentation systems.
The PE3342 features a ÷10/11 dual modulus prescaler, counters, and a phase comparator as shown in Figure 1. Counter values are programmable through a three-wire serial interface.
The PE3342 UltraCMOS™ Phase Locked-Loop is manufactured in Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS process, offering excellent RF performance with the economy and integration of conventional CMOS.

*Field-programmable EEPROM for selfstarting applications
*Standard 2700 MHz operation, 3000 MHz speed-grade option
*÷10/11 dual modulus prescaler
*Internal phase detector
*Serial programmable
*Low power — 20 mA at 3 V
*Ultra-low phase noise
*Available in 24-lead TSSOP or 20-lead 4x4 mm QFN package

3342-01, 3342-02, 3342-03, 3342-04

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The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E01-100 has its own guaranteed unique 64-bit ROM registration number that is factory lasered into the chip. The DS28E01-100 communicates over the single-contact 1-Wire® bus. The communication follows the standard Dallas Semiconductor 1-Wire protocol with the registration number acting as node address in the case of a multi-device 1-Wire network.

*1024 bits of EEPROM memory partitioned into four pages of 256 bits
*On-chip 512-bit SHA-1 engine to compute 160-bit Message Authentication Codes (MAC) and to generate secrets
*Write access requires knowledge of the secret and the capability of computing and transmitting a 160-bit MAC as authorization
*User-programmable page write-protection for page 0, page 3 or all four pages together
*User-programmable OTP EPROM emulation mode for page 1 ("write to 0")
*Communicates to host with a single digital signal at 15.3k bits or 125k bits per second using 1-Wire protocol
*Switchpoint Hysteresis and Filtering to Optimize Performance in the Presence of Noise
*Reads and writes over a wide voltage range of 2.8V to 5.25V from -40°C to +85°C
*6-lead TSOC, 2-lead SFN or solder-bumped chipscale surface mount package

*Printer Cartridge Configuration and Monitoring
*Medical Sensor Authentication and Calibration
*System Intellectual Property Protection

DS28E01P-100, DS28E01P-100/T&R, DS28E01P-100+, DS28E01P-100+T&R

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Maxwell Technologies’ 79C0832 multi-chip module (MCM) memory features a greater than 100 krad (Si) total dose tolerance, dependent upon orbit. Using Maxwell Technologies’ patented radiation-hardened RAD-PAK® MCM packaging technology, the 79C0832 is the first radiation-hardened 8 megabit MCM EEPROM for space application. The 79C0832 uses eight 1 Megabit high speed CMOS die to yield an 8 megabit product. The 79C0832 is capable of in-system electrical byte and page programmability. It has a 128 x 8 byte page programming function to make its erase and write operations faster. It also features Data Polling and a Ready/Busy signal to indicate the completion of erase and programming operations. In the 79C0832, hardware data protection is provided with the RES pin, in addition to noise protection on the WE signal and write inhibit on power on and off. Software data protection is implemented using the JEDEC optional standard algorithm.
Maxwell Technologies' patented RAD-PAK® packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Maxwell Technologies self-defined Class K.

*256k x 32-bit EEPROM MCM
*RAD-PAK® radiation-hardened against natural
*space radiation
*Total dose hardness:
->100 krad (Si)
-Dependent upon orbit
*Excellent Single event effects
-SELTH > 120 MeV/mg/cm2
-SEU > 90 MeV/mg/cm2 read mode
-SEU = 18 MeV/mg/cm2 write mode
*High endurance
-10,000 cycles/byte (Page Programming Mode)
-10 year data retention
*Page Write Mode: 1 to 8 X 128 byte page
*High Speed:
-150 and 200 ns maximum access times
*Automatic programming
-10 ms automatic Page/Byte write
*Low power dissipation
-160 mW/MHz active current
-880 μW standby current

79C0832RPQK-15, 79C0832XPQK-15, 79C0832RT1QK-15, 79C0832RT2QK-15

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The ISL12026 and the ISL12026A devices are micro power real time clocks with timing and crystal compensation, clock/calender, power-fail indicator, two periodic or polled alarms, intelligent battery backup switching, and integrated 512x8-bit EEPROM configured in 16 Bytes per page.
The oscillator uses an external, low-cost 32.768kHz crystal. The real time clock tracks time with separate registers for hours, minutes, and seconds. The device has calendar registers for date, month, year and day of the week. The calendar is accurate through 2099, with automatic leap year correction.
The ISL12026 and ISL12026A have different types of Power Control Settings. The ISL12026 uses the Legacy Mode Setting, which follows conditions set in X1226 products. The ISL12026A uses the Standard Mode Setting. Please refer to “Power Control Operation” on page 13 for more details. Also, please refer to “I2C Communications During Battery Backup” on page 22 for important details.

*Real Time Clock/Calendar
-Tracks Time in Hours, Minutes and Seconds
-Day of the Week, Day, Month and Year
-3 Selectable Frequency Outputs
*Two Non-Volatile Alarms
-Settable on the Second, Minute, Hour, Day of the Week, Day or Month
-Repeat Mode (Periodic Interrupts)
*Automatic Backup to Battery or SuperCap
*On-Chip Oscillator Compensation
-Internal Feedback Resistor and Compensation Capacitors
-64 Position Digitally Controlled Trim Capacitor
-6 Digital Frequency Adjustment Settings to ±30ppm
*512x8 Bits of EEPROM
-16-Byte Page Write Mode (32 total pages)
-8 Modes of BlockLock™ Protection
-Single Byte Write Capability
*High Reliability
-Data Retention: 50 years
-Endurance: >2,000,000 Cycles Per Byte
*I2C Interface
-400kHz Data Transfer Rate
*800nA Battery Supply Current
*Package Options
-8 Ld SOIC and 8 Ld TSSOP Packages
*Pb-Free (RoHS Compliant)

*Utility Meters
*HVAC Equipment
*Audio/Video Components
*Set-Top Box/Television
*Network Routers, Hubs, Switches, Bridges
*Cellular Infrastructure Equipment
*Fixed Broadband Wireless Equipment
*POS Equipment
*Test Meters/Fixtures
*Office Automation (Copiers, Fax)
*Home Appliances
*Computer Products
*Other Industrial/Medical/Automotive

ISL12026IBZ, ISL12026IVZ, ISL12026AIBZ, ISL12026AIVZ

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The T89C51AC2 is a high performance CMOS FLASH version of the 80C51 CMOS single chip 8-bit microcontrollers. It contains a 32Kbytes Flash memory block for program and data.
The 16K bytes or 32K bytes FLASH memory can be programmed either in parallel mode or in serial mode with the ISP capability or with software. The programming voltage is internally generated from the standard VCC pin.
The T89C51AC2 retains all features of the 80C52 with 256 bytes of internal RAM, a 7-source 4-level interrupt controller and three timer/counters.
In addition, the T89C51AC2 has a 10 bits A/D converter, a 2Kbytes Boot Flash Memory, 2 Kbytes EEPROM for data, a Programmable Counter Array, an XRAM of 1024 byte, a Hardware Watchdog Timer and a more versatile serial channel that facilitates multiprocessor communication (EUART).
The fully static design of the T89C51AC2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
The T89C51AC2 has 2 software-selectable modes of reduced activity and 8 bit clock prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
The added features of the T89C51AC2 make it more powerful for applications that need A/D conversion, pulse width modulation, high speed I/O and counting capabilities such as industrial control, consumer goods, alarms, motor control, ...
While remaining fully compatible with the 80C51 it offers a superset of this standard microcontroller. In X2 mode a maximum external clock rate of 20 MHz reaches a 300 ns cycle time.

*80C51 core architecture:
*256 bytes of on-chip RAM
*1Kbytes of on-chip XRAM
*32 Kbytes of on-chip Flash memory
*2 Kbytes of on-chip Flash for Bootloader
*2 Kbytes of on-chip EEPROM
*14-source 4-level interrupt
*Three 16-bit timer/counter
*Full duplex UART compatible 80C51
*maximum crystal frequency 40 MHz. In X2 mode, 20 MHz (CPU core, 40 MHz)
*Five ports: 32 + 2 digital I/O lines
*Five channel 16-bit PCA with:
- PWM (8-bit)
- High-speed output
- Timer and edge capture
*Double Data Pointer
*21 bit watchdog timer (including 7 programmable bits)
*A 10-bit resolution analog to digital converter (ADC) with 8 multiplexed inputs
*20 microsecond conversion time
*Two conversion modes
*On-chip emulation Logic (enhanced Hook system)
*Power saving modes:
*Idle mode
*Power down mode
*Power supply: 5V +/- 10% (or 3V** +/- 10%)
*Temperature range: Industrial (-40 to +85C)
*Packages: TQFP44, PLCC44


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The CAT24C03/CAT24C05 is a 2-kb/4-kb CMOS Serial EEPROM device organized internally as 16/32 pages of 16 bytes each, for a total of 256x8/512x8 bits. These devices support both Standard (100kHz) as well as Fast (400kHz) I2C protocol.
Data is written by providing a starting address, then loading 1 to 16 contiguous bytes into a Page Write Buffer, and then writing all data to non-volatile memory in one internal write cycle. Data is read by providing a starting address and then shifting out data serially while automatically incrementing the internal address count.
Write operations can be inhibited for upper half of memory by taking the WP pin High.
External address pins make it possible to address up to eight CAT24C03 or four CAT24C05 devices on the same bus.

*Supports Standard and Fast I2C Protocol
*1.8 V to 5.5 V Supply Voltage Range
*16-Byte Page Write Buffer
*Hardware Write Protection for upper half of memory
*Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA).
*Low power CMOS technology
*1,000,000 program/erase cycles
*100 year data retention
*Industrial temperature range
*RoHS-compliant 8-lead PDIP, SOIC, and TSSOP, 8-pad TDFN and 5-lead TSOT-23 packages.


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The AT24C128B provides 131,072 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The device’s cascadable feature allows up to eight devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 packages. In addition, the entire family is available in a 1.8V (5.5V to 3.6V)

*Low-voltage and Standard-voltage Operation
*1.8 (VCC = 1.8V to 5.5V)
*Internally Organized as 16,384 x 8
*Two-wire Serial Interface
*Schmitt Trigger, Filtered Inputs for Noise Suppression
*Bidirectional Data Transfer Protocol
*1 MHz (5.5V, 2.5V), and 400 kHz (1.8V) Compatibility
*Write Protect Pin for Hardware and Software Data Protection
*64-byte Page Write Mode (Partial Page Writes Allowed)
*Self-timed Write Cycle (5 ms Max)
*High Reliability
*Endurance: One Million Write Cycles
*Data Retention: 40 Years
*8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 Packages
*Die Sales: Wafer Form, Tape and Reel and Bumped Wafers

AT24C128B-PU, AT24C128BN-SH-B, AT24C128BN-SH-T, AT24C128B-TH-B, AT24C128B-TH-T, AT24C128BY6-YH-T, AT24C128BD3-DH-T, AT24C128BU2-UU-T, AT24C128B-W-11

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The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16
bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits
each when it is tied to ground.
The device is optimized for use in many industrial and commercial applications where low power and low voltage operations are essential.
The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-pin JEDEC and
EIAJ SOIC packages.

*Low Voltage and Standard Voltage Operation
-5.0 (VCC = 4.5V to 5.5V)
-2.7 (VCC = 2.7V to 5.5V)
-2.5 (VCC = 2.5V to 5.5V)
-1.8 (VCC = 1.8V to 5.5V)
*User Selectable Internal Organization
-1K: 128 x 8 or 64 x 16
-2K: 256 x 8 or 128 x 16
-4K: 512 x 8 or 256 x 16
*3-Wire Serial Interface
*2 MHz Clock Rate (5V) Compatibility
*Self-Timed Write Cycle (10 ms max)
*High Reliability
-Endurance: 1 Million Write Cycles
-Data Retention: 100 Years
-ESD Protection: >4000V
*Automotive Grade and Extended Temperature Devices Available
*8-Pin PDIP, 8-Pin JEDEC and EIAJ SOIC, and 8-Pin TSSOP Packages


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General Description
The HT93LC66 is a 4K-bit low voltage nonvolatile, serial electrically erasable programmable read only memory device using the CMOS floating gate process.
Its 4096 bits of memory are organized into 256 words of 16 bits each when the ORG pin is connected to VCC or organized into 512 words of 8 bits each when it is tied to VSS.
The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential.
By popular microcontroller, the versatile serial interface including chip select (CS), serial clock (SK), data input (DI) and data output (DO) can be easily controlled.

* Operating voltage: 2.2V~5.5V
* Low power consumption
- Operating: 5mA max.
- Standby: 10A max.
* User selectable internal organization
- 4K(HT93LC66): 5128 or 25616
* 3-wire Serial Interface
* Write cycle time: 5ms max.
* Automatic erase-before-write operation
* Word/chip erase and write operation
* Write operation with built-in timer
* Software controlled write protection
* 10-year data retention after 100K rewrite cycles
* 106 rewrite cycles per word
* Commercial temperature range (0C to +70C)
* 8-pin DIP/SOP/TSSOP package

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