Description
The EM44AM1684LBA is a high speed Double Date Rate 2 (DDR2) Synchronous DRAM fabricated with ultra high performance CMOS process containing 268,435,456 bits which organized as 4Mbits x 4 banks by 16 bits.
This synchronous device achieves high speed double-data-rate transfer rates of up to 667 Mb/sec/pin (DDR2-667) for general applications.
The chip is designed to comply with the following key DDR2 SDRAM features: (1) posted CAS with additive latency, (2) write latency = read latency -1, (3) Off-Chip Driver (OCD) impedance adjustment and On Die Termination (4) normal and weak strength data output driver.
All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and /CK falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and /DQS) in a source synchronous fashion. The address bus is used to convey row, column and bank address information in a /RAS and /CAS multiplexing style.
The 512Mb DDR2 device operates with a single power supply: 1.8V ± 0.1V VDD and VDDQ.
Available package: TFBGA-84Ball (12.5mmx10mm, 0.8mm x 0.8mm ball pitch).

Features
*JEDEC Standard VDD/VDDQ=1.8V ± 0.1V.
*All inputs and outputs are compatible with SSTL_18 interface.
*Fully differential clock inputs (CK,/CK) operation.
*4 Banks
*Posted CAS
*Burst Length: 4 and 8.
*Programmable CAS Latency (CL): 3, 4 and 5.
*Programmable Additive Latency (AL): 0, 1, 2, 3 and 4.
*Write Latency (WL) =Read Latency (RL) -1.
*Read Latency (RL) = Programmable Additive Latency (AL) + CAS Latency (CL)
*Bi-directional Differential Data Strobe (DQS).
*Data inputs on DQS centers when write.
*Data outputs on DQS, /DQS edges when read.
*On chip DLL align DQ, DQS and /DQS transition with CK transition.
*DM mask write data-in at the both rising and falling edges of the data strobe.
*Sequential & Interleaved Burst type available.
*Off-Chip Driver (OCD) Impedance Adjustment
*On Die Termination (ODT)
*Auto Refresh and Self Refresh
*8,192 Refresh Cycles / 64ms
*Average Refresh Period 7.8us at lower than Tcase 85°C, 3.9us at 85°C < Tcase ≦ 95°C
*RoHS Compliance
*Partial Array Self-Refresh (PASR)
*High Temperature Self-Refresh rate enable

EM44AM1684LBA-5F, EM44AM1684LBA-37F, EM44AM1684LBA-3F

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DESCRIPTION
The NE/SA612A is a low-power VHF monolithic double-balanced mixer with on-board oscillator and voltage regulator. It is intended for low cost, low power communication systems with signal frequencies to 500MHz and local oscillator frequencies as high as 200MHz. The mixer is a “Gilbert cell” multiplier configuration which provides gain of 14dB or more at 45MHz.
The oscillator can be configured for a crystal, a tuned tank operation, or as a buffer for an external L.O. Noise figure at 45MHz is typically below 6dB and makes the device well suited for high performance cordless phone/cellular radio. The low power consumption makes the NE/SA612A excellent for battery operated equipment. Networking and other communications products can benefit from very low radiated energy levels within systems. The NE/SA612A is available in an 8-lead dual in-line plastic package and an 8-lead SO (surface mounted miniature package).

FEATURES
*Low current consumption
*Low cost
*Operation to 500MHz
*Low radiated energy
*Low external parts count; suitable for crystal/ceramic filter
*Excellent sensitivity, gain, and noise figure

APPLICATIONS
*Cordless telephone
*Portable radio
*VHF transceivers
*RF data links
*Sonabuoys
*Communications receivers
*Broadband LANs
*HF and VHF frequency conversion
*Cellular radio mixer/oscillator

NE612AN, NE612AD, SA612AN, SA612AD

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Features
* Integrated Gain, Doubler and Driver Stages
* Single Positive Supply, +5V
* Integrated Bypassing Capacitor
* +20.0 dBm Output Saturated Power
* 35.0 dBc Fundamental Suppression
* On-Chip ESD Protection
* 100% RF, DC and Output Power Testing
* 3x3 QFN Package
* RoHS Compliant

General Description
Mimix Broadband’s 13.5-17.0 / 27.0-34.0 GHz GaAs MMIC doubler integrates a gain stage, passive doubler and driver amplifier onto a single device.
The XX1007-QT has a self-biased architecture requiring a single positive supply (+5V) only and integrated on-chip bypassing and DC blocking capacitors eliminating the need for any external
components.
This device uses Mimix Broadband’s 0.15um GaAs PHEMT device model technology, and is based upon electron beam lithography to ensure high repeatability and uniformity.
XX1007-QT has integrated ESD structures for protection and comes in a low cost 3x3mm QFN package.
The device is well suited for Millimeter wave Point-to-Point Radio, LMDS, SATCOM and VSAT applications.

XX1007-QT-0G00
XX1007-QT-0G0T
XX1007-QT-EV1
TAG Double

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