DESCRIPTION
The MC74VHC4066 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power–supply range (from VCC to GND).
The VHC4066 is identical in pinout to the metal–gate CMOS MC14066 and the high–speed CMOS HC4066A. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches.
The ON/OFF control inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. For analog switches with voltage–level translators, see the VHC4316.

FEATURES
*Fast Switching and Propagation Speeds
*High ON/OFF Output Voltage Ratio
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Analog Input Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066
*Low Noise
*Chip Complexity: 44 FETs or 11 Equivalent Gates

MC74VHC4066D,  MC74VHC4066DT, 74VHC4066

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DESCRIPTION
The MC74VHCT4051 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from VCC to GND).
The VHCT4051 is identical in pinout to the high–speed HC4051A and the metal–gate MC14051B. The Channel–Select inputs determine which one of the Analog Inputs/Outputs is to be connected by means of an analog switch to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off.
The Channel–Select and Enable inputs are compatible with TTL–type input thresholds. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the higher–voltage power supply.
The MC74VHCT4051 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74VHCT4051 to be used to interface 5V circuits to 3V circuits.
This device has been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal–gate CMOS analog switches.
For a multiplexer/demultiplexer with channel–select latches, see VHC4351.

FEATURES
*Fast Switching and Propagation Speeds
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Analog Power Supply Range (VCC – GND) = 2.0 to 6.0 V
*Digital (Control) Power Supply Range (VCC – GND) = 2.0 to 6.0 V
*Improved Linearity and Lower ON Resistance Than Metal–Gate Counterparts
*Low Noise
*In Compliance With the Requirements of JEDEC Standard No. 7A

MC74VHCT1051D, MC74VHCT4051DT

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DESCRIPTION
The MC54/74HC4066A utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power–supply range (from VCC to GND).
The HC4066A is identical in pinout to the metal–gate CMOS MC14016 and MC14066. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches.
The ON/OFF control inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
For analog switches with voltage–level translators, see the HC4316A.

FEATURES
*Fast Switching and Propagation Speeds
*High ON/OFF Output Voltage Ratio
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Analog Input Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066
*Low Noise
*Chip Complexity: 44 FETs or 11 Equivalent Gates

MC74HC4066A, MC54HCXXXXAJ, MC74HCXXXXAN, MC74HCXXXXAD, MC74HCXXXXADT

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General description
The 74HC4053; 74HCT4053 is a high-speed Si-gate CMOS device and is pin compatible
with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The 74HC4053; 74HCT4053 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3. VCC and GND are the supply voltage pins for the digital control inputs (S1 to S3 and E). The VCC to GND ranges are 2.0 V to 10.0 V for 74HC4053 and 4.5 V to 5.5 V for 74HCT4053. The analog inputs/outputs (nY0 and nY1, and nZ) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

Features
ㅁ Low ON resistance:
  * 80 W (typical) at VCC - VEE = 4.5 V
  * 70 W (typical) at VCC - VEE = 6.0 V
  * 60 W (typical) at VCC - VEE = 9.0 V
ㅁ Logic level translation:
  * To enable 5 V logic to communicate with ±5 V analog signals
ㅁ Typical ‘break before make’ built in
ㅁ Complies with JEDEC standard no. 7A
ㅁ ESD protection:
  * HBM EIA/JESD22-A114-C exceeds 2000 V
  * MM EIA/JESD22-A115-A exceeds 200 V
ㅁ Multiple package options
ㅁ Specified from -40 °C to +85 °C and from -40 °C to +125 °C


74HCT4053 74HC4053D 74HCT4053N 74HCT4053D 74HCT4053PW 74HCT4053BQ

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FEATURES
· Wide analog input voltage range: ± 5 V.
· Low “ON” resistance:
80 W (typ.) at VCC - VEE = 4.5 V
70 W (typ.) at VCC - VEE = 6.0 V
60 W (typ.) at VCC - VEE = 9.0 V
· Logic level translation:
to enable 5 V logic to communicate with ± 5 V analog
signals
· Typical “break before make” built in
· Output capability: non-standard
· ICC category: MSI

GENERAL DESCRIPTION

The 74HC/HCT4051 are high-speed Si-gate CMOS devices and are pin compatible with the “4051” of the “4000B” series. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT4051 are 8-channel analog multiplexers/demultiplexers with three digital select inputs (S0 to S2), an active LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high impedance OFF-state, independent of S0 to S2. VCC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The VCC to GND ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT. The analog inputs/outputs (Y0 to Y7, and Z) can swing between VCC as a positive limit and VEE as a negative limit. VCC - VEE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to GND (typically ground).

74HCT4051 74HCU4051 74HCMOS4051

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FEATURES
· Demultiplexing capability
· Multiple input enable for easy expansion
· Ideal for memory chip select decoding
· Active LOW mutually exclusive outputs
· Output capability: standard
· ICC category: MSI

GENERAL DESCRIPTION
The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT138 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). The “138” features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the “138” to a 1-of-32 (5 lines to 32 lines) decoder with just four “138” ICs and one inverter. The ”138” can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. The ”138” is identical to the “238” but has inverting outputs.

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General Description
The CD4051BC, CD4052BC, and CD4053BC analog multiplexers/ demultiplexers are digitally controlled analog switches having low “ON” impedance and very low “OFF” leakage currents. Control of analog signals up to 15Vp-p can be achieved by digital signal amplitudes of 3−15V. For example, if VDD = 5V, VSS = 0V and VEE = −5V, analog signals from −5V to +5V can be controlled by digital inputs of 0−5V. The multiplexer circuits dissipate extremely low quiescent
power over the full VDD−VSS and VDD−VEE supply voltage ranges, independent of the logic state of the control signals. When a logical “1” is present at the inhibit input terminal all channels are “OFF”. CD4051BC is a single 8-channel multiplexer having three binary control inputs. A, B, and C, and an inhibit input. The three binary signals select 1 of 8 channels to be turned “ON” and connect the input to the output. CD4052BC is a differential 4-channel multiplexer having two binary control inputs, A and B, and an inhibit input. The two binary input signals select 1 or 4 pairs of channels to be turned on and connect the differential analog inputs to the differential outputs. CD4053BC is a triple 2-channel multiplexer having three separate digital control inputs, A, B, and C, and an inhibit input. Each control input selects one of a pair of channels which are connected in a single-pole double-throw configuration.

Features
ㅁWide range of digital and analog signal levels:
digital 3 – 15V, analog to 15Vp-p
ㅁLow “ON” resistance: 80Ω (typ.) over entire 15Vp-p signal-input range for VDD − VEE = 15V
ㅁHigh “OFF” resistance:
channel leakage of ±10 pA (typ.) at VDD − VEE = 10V
ㅁLogic level conversion for digital addressing signals of 3 – 15V (VDD − VSS = 3 – 15V) to switch analog signals to 15 Vp-p (VDD − VEE = 15V)
ㅁMatched switch characteristics:
ΔRON = 5Ω (typ.) for VDD − VEE = 15V
ㅁVery low quiescent power dissipation under all digital-control input and supply conditions:
1 μ W (typ.) at VDD − VSS = VDD − VEE = 10V
ㅁBinary address decoding on chip

CD4052BC CD4053BC CD4051BCMTC CD4051BCN CD4052BCM CD4052BCSJ

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General Description
These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring very short propagation delay times. In high-performance memory systems these decoders can be used to minimize the effects of system decoding. When used with high-speed memories, the delay times of these decoders are usually less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible. The DM74LS138 decodes one-of-eight lines, based upon the conditions at the three binary select inputs and the three enable inputs. Two active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding. A 24-line decoder can be implemented with no external inverters, and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The DM74LS139 comprises two separate two-line-to-fourline
decoders in a single package. The active-low enable input can be used as a data line in demultiplexing applications. All of these decoders/demultiplexers feature fully buffered
inputs, presenting only one normalized load to its driving circuit. All inputs are clamped with high-performance Schottky diodes to suppress line-ringing and simplify system
design.

Features
· Designed specifically for high speed:
  Memory decoders
  Data transmission systems
· DM74LS138 3-to-8-line decoders incorporates 3 enable
  inputs to simplify cascading and/or data reception
· DM74LS139 contains two fully independent 2-to-4-line
  decoders/demultiplexers
· Schottky clamped for high performance
· Typical propagation delay (3 levels of logic)
  DM74LS138   21 ns
  DM74LS139   21 ns
· Typical power dissipation
  DM74LS138   32 mW
  DM74LS139   34 mW

DM74LS139 DM74LS138M DM74LS139M DM74LS138SJ

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General Description
The NC7SZ19 is a 1-of-2 decoder with a common output enable. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC operating range. The inputs and outputs are high impedance when VCC is 0V.
Inputs tolerate voltages up to 5.5V independent of VCC operating range.

Features
■ Space saving SC70 6-lead surface mount package
■ Ultra small MicroPak leadless package
■ Ultra High Speed: tPD 2.7 ns Typ into 50 pF at 5V VCC
■ Broad VCC Operating Range; 1.65V to 5.5V
■ Power down high impedance inputs/outputs
■ Overvoltage tolerant inputs facilitate 5V to 3V translation
■ Patented noise/EMI reduction circuitry implemented

NC7SZ19P6X, NC7SZ19L6X

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