Description
Cost optimization in car manufacturing is of extreme importance today. Solutions to this problem often implies the use of more advanced and intelligent electronic circuits.
The TSS461E is a circuit which allows the transfer of all the status information needed in a car or truck over a single low-cost wire pair, thereby, minimizing the electrical wire usage.
It can be used to interconnect powerful functions (ABS, dashboard, power train control) and to control and interface car body electronics (lights, wipers, power window, etc.).
The TSS461E is fully compliant with the ISO standard 11519-3. This standard supports a wide range of applications such as low-cost remote control switches, typically used for lamp control; complex, highly-autonomous, distributed systems like engine controls, which require fast and secure data transfers.
The TSS461E is a microprocessor-interfaced line controller for mid-to-high complexity bus-masters and listeners like injection/ignition control calculators, dashboard controllers and car stereo or mobile telephone CPUs.
The microprocessor interface consists of a 256-bytes of RAM and the register area is divided into 11 control registers, 14 channel register sets and 128 bytes of general purpose RAM, used as a message storage area, and a 6-source maskable interrupt.
The circuit operates in RAM using DMA techniques, controlled by the channel and control registers. This allows virtually any microprocessor to interface with ease to the TSS461E, and to use the free RAM as a scratch pad.
Messages are encoded in enhanced Manchester code, and an optional pulsed code for use with an optical or radio link, at a maximum bit rate of 1 Mbit/s. The TSS461E analyzes the messages received or transmitted according to 6 different criteria including some higher level checks.
In addition, the bus interface has three separate inputs with automatic source diagnosis and selection, allowing for multibus listening or the automatic selection of the most reliable source at any time if several line receivers are connected to the same bus.

Features
*Fully Compliant to VAN Specification ISO/11519.3
*Handles All Specified Module Types
*Handles All Specified Message Types
*Handles Retransmission of Frames on Contention and Errors
*3 Separate Line Inputs with Automatic Diagnosis and Selection
*1 Mbit/s Maximum Transfer Rate
*Normal or Pulsed (Optical and Radio Mode) Coding
*Intel®, NEC®, Texas Instruments® and Motorola® Compatible 8-bit Microprocessor Interface
*Multiplexed Address and Data Bus
*Idle and Sleep Modes
*128 Bytes of General-purpose RAM
*DMA Capabilities for Message Handling
*14 Identifier Registers with All Bits Individually Maskable
*6-source Maskable Interrupt Including an Interrupt-on-reset to Detect Glitches on the Reset Pin
*Integrated Crystal or Resonator Oscillator with Internal Baud Rate Generator and Buffered Clock Output
*Single +5V Power Supply
*0.5 mm CMOS Technology
*SOP 24 Packaging

TSS461E-TDSA-9, TSS461E-TDRA-9, TSS461E-TDRZ-9

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DESCRIPTION
The APU3048 IC combines a Dual synchronous Buck controller and a linear regulator controller, providing a cost-effective, high performance and flexible solution for multi-output applications. The Dual synchronous controller is configured as 2-independent PWM controller. APU3048 provides a separate adjustable output by driving a switch as a linear regulator. This device features an internal 200KHz oscillator, under-voltage lockout for all input supplies, an external programmable soft start function as well as output under-voltage detection that latches off the device when an output short is detected.

FEATURES
*Dual Synchronous Controller in 16-Pin Package with 1808 out-of-phase operation
*LDO Controller with 40mA drive
*Configured as 2-Independent PWM Controller
*Flexible, Same or Separate Supply Operation
*Operation from 4V to 25V Input
*Internal 200KHz Oscillator
*Soft-Start controls all outputs
*Fixed Frequency Voltage Mode
*500mA Peak Output Drive Capability
*Programmable Outputs
*RoHS Compliant

APPLICATIONS
*DDR Memory Source Sink Vtt Application
*Graphic Card
*Hard Disk Drive
*Power supplies requiring multiple outputs

APU3048O, APU3048M

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DESCRIPTION
The CXD1969 is an ‘Plug & Play’ and OpenCableTMCableCARDTM interface controller IC designed for use withOpenCableTM compliant CableCARDTMmodules. It performs the communication interface between a host microcontrollerand the CableCARDTM. The IC communicates to the Hosteither by a 68k-type or I2C connection. Communicationbetween the CXD1969 and the CableCARDTMis highly efficient due to the inclusion of a fully integrated hardware Physicallayer.
MPEG2 Transport Stream interfaces are fully programmable ensuring compatibility to commonly used Front End demodulators and MPEG2 decoders.
A SCTE 28 compliant software stack is also available for this device.

FEATURES
*PC Card Interface
-Fully integrated CableCARDTM interface.
-Support for generic PC Cards.
-Supports 3V3 modules (VPP either 3V3 or 5V)
-Integrated Physical layer with 1Kbyte buffers.
*Host Interface
-68k-type host bus interface
-27MHz or 33MHz operating frequency.
-I2C host bus interface.
-100kHz or 400kHz operation.
-Maskable/programmable interrupt capability.
-3V3 logic levels.
*OOB Interface
-Supports SCTE 28 Bidirectional OOB I/F.
*Transport Stream Interfaces
-Accepts MPEG2 compliant TS.
-SCTE28 compliant parallel TS interfaces to/from POD Card.
-TS interface from tuner (up to 72Mbits/s).
-Serial TS interface to downstream device (up to 72Mbits/s).
-Four serial input and output modes.
*Miscellaneous
-Integrated PLL for serial TS.
-5V compatible I/Os.
-LQFP 100-pin package.

APPLICATIONS
*iDTV
*Set Top Box
*Personal Video Recorder (PVR)

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INTRODUCTION
SN6A264 is a series of single chip voice/dual tone melody synthesizer IC with 16*33/8*40/4*40 direct drive capability which contains two 4-bit I/O ports and a tiny controller. By programming through the tiny controller, user’s application including LCD display, section combination, trigger modes, output status, voice/melody playing and other logic functions and then be easily implemented.

FEATURES
*Single power supply 2.4V – 5.1V
*Built in a tiny controller
*Two 4-bit I/O ports are provided, two optional 4-bit output ports are provided
*256*4 bits RAM for programming usage are provided
*160*4 bits RAM for LCD display usage are provided
*Maximum 64k*10 program ROM is provided
*Readable ROM code data
*Built in direct 16*33/8*40/4*40 LCD driver
*LCD 1/4 bias, 1/5 bias; 1/8 duty, 1/16 duty
*Built in a high quality speech synthesizer
*Adaptive playing speed from 2.5k-40kHz is provided
*Built in a dual tone melody generator
*Speech/Dual tone melody mixer is provided which SN6A264 can play speech and dual tone melody simultaneously
*Fixed current D/A output is provided to drive external connected transistor for sound output
*PWM output is provided to drive external connected piezo buzzer

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General description
The ISP1562 is a Peripheral Component Interconnect (PCI)-based, single-chip Universal Serial Bus (USB) host controller. It integrates two Original USB Open Host Controller Interface (OHCI) cores, one Hi-Speed USB Enhanced Host Controller Interface (EHCI) core, and two transceivers that are compliant with Hi-Speed USB and Original USB. The functional parts of the ISP1562 are fully compliant with Universal Serial Bus Specification Rev. 2.0, Open Host Controller Interface Specification for USB Rev. 1.0a, Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0, PCI Local Bus Specification Rev. 2.2, and PCI Bus Power Management Interface Specification Rev. 1.1.
Integrated high performance USB transceivers allow the ISP1562 to handle all Hi-Speed USB transfer speed modes: high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s). The ISP1562 provides two downstream ports, allowing simultaneous connection of USB devices at different speeds.
The ISP1562 is fully compatible with various Operating System (OS) drivers, such as Microsoft Windows standard OHCI and EHCI drivers that are present in Windows XP, Windows 2000 and Red Hat Linux.
The ISP1562 directly interfaces to any 32-bit, 33 MHz PCI bus. Its PCI pins can source 3.3 V. The PCI interface fully complies with PCI Local Bus Specification Rev. 2.2.
The ISP1562 is ideally suited for use in Hi-Speed USB mobile applications and embedded solutions. The ISP1562 uses a 12 MHz crystal.

Features
*Complies with Universal Serial Bus Specification Rev. 2.0
*Supports data transfer at high-speed (480 Mbit/s), full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s)
*Two Original USB OHCI cores comply with Open Host Controller Interface Specification for USB Rev. 1.0a
*One Hi-Speed USB EHCI core complies with Enhanced Host Controller Interface Specification for Universal Serial Bus Rev. 1.0
*Supports PCI 32-bit, 33 MHz interface compliant with PCI Local Bus Specification Rev. 2.2, with support for D3cold standby and wake-up modes; all I/O pins are 3.3 V standard
*Compliant with PCI Bus Power Management Interface Specification Rev. 1.1 for all hosts (EHCI and OHCI), and supports all power states: D0, D1, D2, D3hot and D3cold
*CLKRUN support for mobile applications, such as internal notebook design
*Configurable subsystem ID and subsystem Vendor ID through external EEPROM
*Digital and analog power separation for better ElectroMagnetic Interference (EMI) and
ElectroStatic Discharge (ESD) protection
*Supports hot Plug and Play and remote wake-up of peripherals
*Supports individual power switching and individual overcurrent protection for downstream ports
*Supports partial dynamic port-routing capability for downstream ports that allows sharing of the same physical downstream ports between the Original USB host controller and the Hi-Speed USB host controller
*Uses 12 MHz crystal oscillator to reduce system cost and EMI emissions
*Supports dual power supply: PCI Vaux(3V3) and VCC
*Operates at +3.3 V power supply input
*Low power consumption
*Full industrial operating temperature range from -40 °C to +85 °C
*Full-scan design with high fault coverage (93 % to 95 %) ensures high quality
*Available in LQFP100 package

Applications
*Digital consumer appliances
*Notebook
*PCI add-on card
*PC motherboard
*Set-Top Box (STB)
*Web appliances

ISP1562BE

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General Description
This EPROM-Based 8-bit micro-controller uses a fully static CMOS design technology combines higher speeds and smaller size with the low power and high noise immunity of CMOS. On chip memory system includes 0.5 K(for MDT2005) bytes of ROM, and 32 bytes of static RAM.

Features
The followings are some of the features on the hardware and software :
*Fully CMOS static design
*8-bit data bus
*On chip ROM size : 512 words for MDT2005
*Internal RAM size : 32 bytes (25 general purpose registers, 7 special registers)
*36 single word instructions
*14-bit instructions
*2-level stacks
*Operating voltage : 2.3V ~ 6.0 V
*Operating frequency : 0 ~ 20 MHz
*The most fast execution time is 200 ns under 20 MHz in all single cycle instructions except the branch instruction
*Addressing modes include direct, indirect and relative addressing modes
*Power-on Reset (POR), only available while PED is Disable
*Power edge-detector Reset (PED)
*Sleep Mode for power saving
*8-bit real time clock/counter(RTCC) with 8-bit programmable prescaler
*4 types of oscillator can be selected by programming option:
-RC-Low cost RC oscillator
-LFXT-Low frequency crystal oscillator
-XTAL-Standard crystal oscillator
-HFXT-High frequency crystal oscillator
*4 oscillator start-up time can be selected by programming option:
-150 μs, 20 ms, 40 ms, 80 ms
*On-chip RC oscillator based Watchdog Timer(WDT) can be operated freely
*12 I/O pins with their own independent direction control

Applications
The application areas of this MDT2005 range from appliance motor control and high speed automotive to low power remote transmitters/receivers, pointing devices, and telecommunications processors, such as Remote controller, small instruments, chargers, toy, automobile and PC peripheral … etc.

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OVERVIEW
The MPR083 is an Inter-Integrated Circuit Communication (I2C) driven Capacitive Touch Sensor Controller, optimized to manage an 8-position rotary shaped capacitive array. The device can accommodate a wide range of implementations through 3 output mechanisms, and many configurable options.

Features
*1.8 V to 3.6 V operation
*41 μA average supply current with 1 s response time
*2 μA Standby Current
*Variable low power mode response time (32 ms – 4 s)
*Rejects unwanted multi-key detections from EMI events such as PA bursts or user handling
*Ongoing pad analysis and detection is not reset by EMI events
*Data is buffered in a FIFO for shortest access time
*IRQ output advises when FIFO has data
*System can set interrupt behavior as immediate after event, or program a minimum time between successive interrupts
*Current rotary position is always available on demand for pollingbased systems
*Sounder output can be enabled to generate key-click sound when rotary is touched
*Two hardware selectable I2C addresses allowing two devices on a single I2C bus
*Configurable real-time auto calibration
*5 mm x 5 mm x 1 mm 16 lead QFN package
*-40°C to +85°C operating temperature range
 
Implementations
*Control Panels
*Switch Replacements
*Rotary and Linear Sliders

Typical Applications
*Appliances
*PC Peripherals
*Access Controls
*MP3 Players
*Remote Controls
*Mobile Phones

MPR083Q, MPR083EJ

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GENERAL DESCRIPTION
The SP7606 is a fixed frequency boost controller designed to drive loads up to 38V output voltage. The SP7606 was developed to be used in conjunction with the SP7616 to drive a wide range of led chains that require high anode voltages. The ability to disconnect the output voltage feedback resistors (DD Pin) reduces shutdown current. The high switching frequency allows the use of tiny external components and saves layout space and cost. The SP7606 is available in a space-saving 8-pin 2x3 DFN.

FEATURES
*Fixed Frequency 1200kHz Voltage-Mode PWM Operation
*Requires Tiny Inductors and Capacitors
*Adjustable Output Voltage up to 38V
*Up to 85% Efficiency
*Internal Compensation
*Built in current limit
*Low Supply Current
*8-pin 2x3 DFN

APPLICATIONS
*White LED Backlighting when combined with SP7615 or SP7616
*Large LED arrays for general lighting
*General boost, flyback, or SEPIC converters

SP7606ER-L, SP7606ER-L/TR

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GENERAL DESCRIPTION
The CM6805A is the Green-Mode PFC/PWM Combo controller for Desktop PC and High Density AC Adapter. For the power supply, it’s input current shaping PFC performance could be very close to the performance of the CM6800 or ML4800 leading edge modulation average current topology.
CM6805A offers the use of smaller, lower cost bulk capacitors, reduces power line loading and stress on the switching FETs, and results in a power supply fully compliant to IEC1000-3-2 specifications. The CM6805A includes circuits for the implementation of a leading edge modulation, input current shaping technique “boost” type PFC and a trailing edge modulation current, PWM.
The CM6805A’s PFC and PWM operate at the same frequency, 67.5kHz. A PFC OVP comparator shuts down the PFC section in the event of a sudden decrease in load. The PFC section also includes peak current limiting for enhanced system reliability.
PFC has a PFCOFFB pin which can use for AC brown out application and determine the GMth to turn off PFC.

FEATURES
*10-Pin SOIC package.
*Use RAC around 4~8 Mega Ohm at IAC pin.
*Easy to configure into Boost Follower.
*Enable lowest BOM for power supply with PFC.
*Internally synchronized PFC and PWM in one IC.
*Patented slew rate enhanced voltage error amplifier with advanced input current shaping technique.
*Universal Line Input Voltage
*CCM boost or DCM boost with leading edge modulation PFC using Input Current Shaping
Technique.
*Feed forward IAC pin to do the automatic slope compensation.
*PFCOVP, Precision -1V PFC ILIMIT, PFC Tri-Fault Detect comparator to meet UL1950
*Low supply currents; start-up: 100uA typical, operating current: 2mA typical.
*Synchronized leading PFC and trailing edge modulation PWM to reduce ripple current in the
storage capacitor between the PFC and PWM sections and to reduce switching noise in the system
*VIN-OK Comparator to guarantee to enable PWM when PFC reach steady state
*High efficiency trailing-edge current mode PWM
*Exact 50% PWM maximum duty cycle
*UVLO, REFOK, and brownout protection
*Digital PFC and PWM soft start, ~10mS
*Precision PWM 1.5V current limit for current mode operation
*PFCOFFB pin to sense light load to turn off PFC or PFCOFFB pin to sense Input voltage as AC Brown Out

CM6805AGIR

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Description and Applications
The TSS901E provides an interface between a Data-Strobe link - according to the IEEE Std 1355-1995 specification carrying a simple interprocessor communication protocol - and a data processing node consisting of a CPU and a communication and data memory.
The TSS901E offers hardware supported execution of the major parts of the interprocessor communication protocol: data transfer between two nodes of a multi-processor system is performed with minimal host CPU intervention. The TSS901E can execute simple commands to provide basic features for system control functions; a provision of fault tolerant features exists as well.
Although the TSS901E initial exploitation is for use in multi-processor systems where the high speed links standardisation is an important issue and where reliability is a requirement, it could be used in applications such as heterogeneous systems or modules without any communication feature like special image compression chips, some signal processors, application specific programmable logic or mass memory.
The TSS901E may also be used in single board systems where standardised high speed interfaces are needed and systems containing "non-intelligent" modules such as A/D-converter or sensor interfaces which can be assembled with the TSS901E thanks to the "control by link" feature.

Features
*3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction
*A COmmunication Memory Interface (COMI) provides autonomous accesses to a communication memory which are controlled by an arbitration unit, allowing two TSS901E to share one Dual Port Ram without external arbitration
*The scalable databus width (8/16/32 bit) allows flexible integration with any CPU type
*Little or big endian mode is configurable
*AHOst Control Interface (HOCI) gives read/write accesses to the TSS901E configuration registers and to the DS-link channels for the controlling CPU
*Device control via one of the three links allows its use in systems without a local controller
*Link disconnect detection and parity check at token (data and control) level; possible checksum generation for packet level check
*Power saving mode relying on automatic transmit rate reduction
*A user’s manual of the TSS901E (also called SMCS332) is available at:
http://www.spacewire.esa.int/tech/spacewire/products/index.htm
*Designed on Atmel MG1140E matrix and packaged into MQFPL196

TSS901EMA-E

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