DESCRIPTION
M63816P/FP/KP are eight-circuit Single transistor arrays with clamping diodes. The circuits are made of NPN transistors. Both the semiconductor integrated circuits perform high-current driving with extremely low input-current supply.

FEATURES
*Three package configurations (P, FP, and KP)
*Medium breakdown voltage (BVCEO ³ 35V)
*Synchronizing current (IC(max) = 300mA)
*With clamping diodes
*Low output saturation voltage
*Wide operating temperature range (Ta = –40 to +85°C)

APPLICATION
Driving of digit drives of indication elements (LEDs and lamps) with small signals

M63816FP, M63816KP

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Description
The Xc4010D and XC4013D are RAM-less, lower-cost versions of the XC4010 and XC4013. They are identical to the XC4010 and XC4013 in all respects, except for the missing on-chip RAM.
The XC4010D and XC4013D are available in most of the same PLCC, PQFP, and PGA packages as their corresponding XC4000 non-D equivalents. See page 2-70 for details.
The XC4010D and XC4013D are also pin-compatible with the XC5210 (see XC5200 Data Sheet for additional information). The XC5210 provides another possible cost-reduction path for lower-performance applications that do not use the XC4000D features like wide-decoders and carry logic.
For complete electrical specifications, see pages 2-47 through 2-55.
For a detailed description of the device features, architecture and configuration methods, see pages 2-9 through 2-45.
For a detailed list of package printouts, please use the cross-referance on page 2-70.
For package physical dimensions and thermal data, see Section 4.

Features
*Third Generation Field-Programmable Gate Array
–Abundant flip-flops
–Flexible function generators
–No on-chip RAM
–Dedicated high-speed carry-propagation circuit
–Wide edge decoders (four per edge)
–Hierarchy of interconnect lines
–Internal 3-state bus capability
–Eight global low-skew clock or signal distribution network
*Flexible Array Architecture
–Programmable logic blocks and I/O blocks
–Programmable interconnects and wide decoders
*Sub-micron CMOS Process
–High-speed logic and Interconnect
–Low power consumption
*Systems-Oriented Features
–IEEE 1149.1-compatible boundary-scan logic support
–Programmable output slew rate (2 modes)
–Programmable input pull-up or pull-down resistors
–12-mA sink current per output
–24-mA sink current per output pair
*Configured by Loading Binary File
–Unlimited reprogrammability
–Six programming modes
*XACT Development System runs on ’386/’486-type PC, Apollo, Sun-4, and Hewlett-Packard 700 series
–Interfaces to popular design environments like Viewlogic, Mentor Graphics and OrCAD
–Fully automatic partitioning, placement and routing
–Interactive design editor for design optimization
–288 macros, 34 hard macros, RAM/ROM compiler

XC4010D, XC4013D
TAG Array, cell, Logic

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MECHANICAL CHARACTERISTICS
*Standard EIA Chip Size: 0408
*Weight 0.73 milligrams (Approximate)
*Available in Tin-Lead or Lead-Free Plating
*Solder Reflow Temperature:
-Tin-Lead - Sn/Pb, 85/15: 240-245°C
-Lead-Free - Sn/Ag/Cu, 96/3.5/0.5: 260-270°C
*Flammability Rating UL 94V-0
*8mm Plastic & Paper Tape and Reel Per EIA Standard 481
*Device Marking On Reel
*Top Contacts: Solder Bump 0.004” in Height (Nominal)


FEATURES
*ESD Protection > 25 kilovolts
*Available in Voltages Ranging From 3.3V to 36V
*200 Watts Peak Pulse Power per Line (tp = 8/20μs)
*Low Clamping Voltage
*Bidirectional Configuration & Monolithic Structure
*Protects 4 to 7 Lines
*LOW CAPACITANCE
*LOW LEAKAGE CURRENT
*RoHS Compliant in Lead-Free Versions


APPLICATIONS

*Cellular Phones
*Personal Digital Assistant (PDA)
*Notebook Computers
*SMART Cards

IEC COMPATIBILITY (EN61000-4)
*61000-4-2 (ESD): Air - 15kV, Contact - 8kV
*61000-4-4 (EFT): 40A - 5/50ns

LC0408FC3.3C, LC0408FC05C, LC0408FC08C, LC0408FC12C, LC0408FC15C, LC0408FC24C, LC0408FC36C

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DESCRIPTION
The SPE0511 are designed by TVS device that is to protect sensitive electronics from damage or latch-up due to ESD. They are designed for use in applications where board space is at a premium. SPE0511 will protect single line, and may be used on line where the signal polarities swing above and below ground.
SPE0511 offer desirable characteristics for board level protection including fast response time, low operating and clamping voltage, and no device degradation.
SPE0511 may be used to meet the immunity requirements of IEC 61000-4-2, level 4. The small SOD-523 package makes them ideal for use in portable electronics such as cell phones, PDA’s, notebook computers, and digital cameras.

FEATURES
*Transient protection for data lines to
- IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact)
- IEC 61000-4-4 (EFT) 40A (5/50ns)
*Protects single I/O lines
*Working voltage: 5V
*Low leakage current
*Low operating and clamping voltages

APPLICATIONS
*Cellular Handsets and Accessories
*Cordless Phone
*PDA
*Notebooks and Handhelds
*Portable Instrumentation
*Digital Cameras
*MP3 Player

SPE0511D52RG

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General Description
The MLX90255xx linear sensor array consists of a 128 x 1 array of photodiodes, associated
charge amplifier circuitry and a pixel data-hold function that provides simultaneous integration
start and stop times for all pixels. The pixels measure 200μm (H) by 66 μm (W) and there is 8
μm spacing between pixels. Operation is simplified by internal control logic that requires
only a Serial Input (SI) pulse and a clock signal. The sensor consists of 128 photodiodes
arranged in a linear array. Light energy falling on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. During the integration
period, a sampling capacitor connects to the output of the integrator through an analog
switch. The amount of charge accumulated at each pixel is directly proportional to the light
intensity and the integration time. The output and reset of the integrators is controlled by a
132-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI.
This causes all 132 sampling capacitors to be disconnected from their respective integrators
and starts an integrator-reset period.

Features and Benefits
*128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real, 1 dummy, 1
Dark Pixel)
*385 DPI sensor pitch
*High Linearity and Uniformity for 256 Gray-Scale
*High Sensitivity: 1.7V @ 10μW/cm 2 @ 0.7ms integration time
*Special Gain Compensation for use with single LED light source
*Output Referenced to Ground
*Single 5V Supply
*Operation to 1MHz

Applications
*position Sensing
*electrical Power Assist Steering (EPAS)
*spectrometer Applications

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DESCRIPTION
The SP720 is an array of SCR/Diode bipolar structures for ESD and over-voltage protection to sensitive input circuits.
The SP720 has 2 protection SCR/Diode device structures per input.
A total of 14 available inputs can be used to protect up to 14 external signal or bus lines.
Over-voltage protection is from the IN (pins 1-7 and 9-15) to V+ or V-.
The SCR structures are designed for fast triggering at a threshold of one +V BE diode threshold above V+ (Pin 16) or a -V BE diode threshold below V- (Pin 8).
From an IN input, a clamp to V+ is activated if a transient pulse causes the input to be increased to a voltage level greater than one V BE above V+.
A similar clamp to V- is activated if a negative pulse, one V BE less than V-, is applied to an IN input.

Features
*ESD Interface Capability for HBM Standards
-MIL STD 3015.7 . . . 15kV
-IEC 1000-4-2, Direct Discharge, Single Input. . . .  4kV (Level 2)
Two Inputs in Parallel . . . 8kV (Level 4)
-IEC 1000-4-2, Air Discharge. . .15kV (Level 4)
*High Peak Current Capability
-IEC 1000-4-5 (8/20μs) . . . ±3A
-Single Pulse, 100μs Pulse Width . . .±2A
-Single Pulse, 4μs Pulse Width . . .±5A
*Designed to Provide Over-Voltage Protection
-Single-Ended Voltage Range to . . . 30V
-Differential Voltage Range to . . . ±15V
*Fast Switching . . .  2ns Risetime
*Low Input Leakages . . . 1nA at 25℃ (Typ)
*Low Input Capacitance. . .  3pF (Typ)
*An Array of 14 SCR/Diode Pairs
*Operating Temperature Range . . . -40℃ to 105℃

Applications
*Microprocessor/Logic Input Protection
*Data Bus Protection
*Analog Device Input Protection
*Voltage Clamp


SP720AP
SP720AB
SP720ABT

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GENERAL DESCRIPTION
 ALD110802/ALD110902 are monolithic quad/dual N-Channel MOSFETS matched at the factory using ALD’s proven EPAD® CMOS technology.
These devices are intended for low voltage, small signal applications.
The ALD110802/ALD110902 MOSFETS are designed and built for exceptional device electrical characteristics matching.
Since these devices are on the same monolithic chip, they also exhibit excellent tempco tracking characteristics.
They are versatile circuit elements useful as design components for a broad range of analog applications, such as basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications.
For most applications, connect V- and N/C pins to the most negative voltage potential in the system and V+ pin to the most positive voltage potential (or left open unused).
All other pins must have voltages within these voltage limits.
The ALD110802/ALD110902 devices are built for minimum offset voltage and differential thermal response, and they are suited for switching and amplifying applications in <+0.1V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired, as these devices exhibit well controlled turn-off and sub-threshold characteristics and can be biased and operated in the sub-threshold region.
Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment.
The ALD110802/ALD110902 are suitable for use in very low operating voltage or very low power (nanowatt), precision applications which require very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect Transistors result from extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is specified at 30pA at room temperature.
For example, DC beta of the device at a drain current of 3mA and input leakage current of 30pA at 25°C is = 3mA/30pA = 100,000,000.

FEATURES
* Enhancement-mode (normally off)
* Precision Gate Threshold Voltage of +0.2V
* Matched MOSFET to MOSFET characteristics
* Tight lot to lot parametric control
* Low input capacitance
* VGS(th) match (VOS) to 10mV
* High input impedance — 1012Ω typical
* Positive, zero, and negative VGS(th) temperature coefficient
* DC current gain >108
* Low input and output leakage currents

APPLICATIONS
* Ultra low power (nanowatt) analog and digital circuits
* Ultra low operating voltage(<0.2V) circuits
* Sub-threshold biased and operated circuits
* Precision current mirrors and current sources
* Nano-Amp current sources
* High impedance resistor simulators
* Capacitive probes and sensor interfaces
* Differential amplifier input stages
* Discrete Voltage comparators and level shifters
* Voltage bias circuits
* Sample and Hold circuits
* Analog and digital inverters
* Charge detectors and charge integrators
* Source followers and High Impedance buffers
* Current multipliers
* Discrete Analog switches / multiplexers

ALD110902
ALD110802PC
ALD110802SC
ALD110902PA
ALD110902SA

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GENERAL DESCRIPTION
ALD111933 are monolithic dual N-Channel MOSFETs matched at the factory using ALD’s proven EPAD® CMOS technology.
These devices are intended for low voltage, small signal applications.
ALD111933 MOSFETs are designed and built with exceptional device electrical characteristics matching.
Since these devices are on the same monolithic chip, they also exhibit excellent tempco tracking characteristics.
Each device is versatile as a circuit element and is a useful design component for a broad range of analog applications.
They are basic building blocks for current sources, differential amplifier input stages, transmission gates, and multiplexer applications.
For most applications, connect V- and N/C pins to the most negative voltage potential in the system.
All other pins must have voltages within these voltage limits.
The ALD111933 devices are built for minimum offset voltage and differential thermal response, and they are designed for switching and amplifying applications in +3.0V to +10V systems where low input bias current, low input capacitance and fast switching speed are desired.
Since these are MOSFET devices, they feature very large (almost infinite) current gain in a low frequency, or near DC, operating environment.
The ALD111933 are suitable for use in precision applications which require very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is specified at 30pA at room temperature.
For example, DC beta of the device at a drain current of 3mA and input leakage current of 30pA at 25°C is = 3mA/30pA = 100,000,000.

FEATURES
• Enhancement-mode (normally off)
• Standard Gate Threshold Voltages: +3.3V
• Matched MOSFET to MOSFET characteristics
• Tight lot to lot parametric control
• Parallel connection of MOSFETs to increase drain currents
• Low input capacitance
• VGS(th) match to 20mV
• High input impedance — 1012Ω typical
• Positive, zero, and negative VGS(th) temperature coefficient
• DC current gain >108
• Low input and output leakage currents

APPLICATIONS
• Precision current mirrors
• Precision current sources
• Voltage choppers
• Differential amplifier input stages
• Discrete voltage comparators
• Voltage bias circuits
• Sample and Hold circuits
• Analog inverters
• Level shifters
• Source followers and buffers
• Current multipliers
• Discrete analog multiplexers/matrices
• Discrete analog switches
• Low current voltage clamps
• Voltage detectors
• Capacitive probes
• Sensor interfaces
• Peak detectors
• Level shifters
• Multiple preset voltage hysteresis circuits (with other VGS(th) EPAD MOSFETS)
• Energy harvesting circuits
• Zero standby power voltage monitors

ALD111933PAL
ALD111933MAL
ALD111933SAL

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Features
•GaAs infrared emitting diode
•Leadframe arrays, available from 2 to 10 Emitters per array
•Colour: transparent
•High reliability
•Available in bins
•Same package as BPX 80 series
•Miniature package

Applications
•Miniature photointerrupters
•Barcode readers
•Industrial electronics
•For control and drive circuits
•Sensor technology
•Speed controller

LD262
LD263
LD264
LD265
LD266
LD267
LD268
LD269

TAG Array, GaAs

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This Quad TVS/Zener Array family have been designed to Protect Sensitive Equipment against ESD and to prevent Latch-Up events in CMOS circuitry operating at 5V, 12V, 15V and 24V for Unidirectional and Bi-directional protection options. This TVS array offers an integrated solution to protect up to 4 data lines where the board space is a premium.

SPECIFICATION FEATURES
* 50W Power Dissipation (8/20μs Waveform)
* Low Leakage Current, Maximum of 5μA at rated voltage
* IEC61000-4-2 ESD 20kV air, 15kV Contact Compliance
* Very Low Clamping Voltage
* Packaged in the Industry Standard SOIC-8
* Unidirectional and Bi-directional Protection Options
* 100% Tin Matte Finish (RoHS Compliant)

APPLICATIONS
* RS-232C or RS-422 Communication ports
* GPIB/IEEE 485 Ports
* Portable Instrumentation

PJSMDA15
PJSMDA24
PJSMDA05C

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