General Description
The MX7705 low-power, 2-channel, serial-output analog-to-digital converter (ADC) includes a sigma-delta modulator with a digital filter to achieve 16-bit resolution with no missing codes. This ADC is pin compatible and software compatible with the AD7705. The MX7705 features an on-chip input buffer and programmable-gain amplifier (PGA). The device offers an SPI™-/QSPI™-/MICROWIRE™-compatible serial interface.
The MX7705 operates from a single 2.7V to 5.25V supply. The operating supply current is 320μA (typ) with a 3V supply. Power-down mode reduces the supply current to 2μA (typ).
Self-calibration and system calibration allow the MX7705 to correct for gain and offset errors. Excellent DC performance (±0.003% FSR INL) and low noise (650nV) make the MX7705 ideal for measuring low-frequency signals with a wide dynamic range. The device accepts fully differential bipolar/unipolar inputs. An internal input buffer allows for input signals with high source impedances. An on-chip digital filter, with a programmable cutoff and output data rate, processes the output of the sigma-delta modulator. The first notch frequency of the digital filter is chosen to provide 150dB rejection of common-mode 50Hz or 60Hz noise and 98dB rejection of normal-mode 50Hz or 60Hz noise. A PGA and digital filtering allow signals to be directly acquired with little or no signal-conditioning requirements.
The MX7705 is available in 16-pin PDIP, SO, and TSSOP packages.

Features
*Pin Compatible and Software Compatible with the AD7705
*16-Bit Sigma-Delta ADC
*Two Fully Differential Input Channels
*0.003% Integral Nonlinearity with No Missing Codes
*Interface with Schmitt Triggers on Inputs
*Internal Analog Input Buffers
*PGA from 1 to 128
*Single (2.7V to 3.6V) or (4.75V to 5.25V) Supply
*Low Power
-1mW (max), 3V Supply
-2μA (typ) Power-Down Current
*SPI-/QSPI-/MICROWIRE-Compatible 3-Wire Serial Interface
*16-Pin PDIP, SO, and TSSOP Packages

Applications
*Industrial Instruments
*Weigh Scales
*Strain-Gauge Measurements
*Loop-Powered Systems
*Flow and Gas Meters
*Medical Instrumentation
*Pressure Transducers
*Thermocouple Measurements
*RTD Measurements

MX7705EPE, MX7705EWE, MX7705EUE

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GENERAL DESCRIPTION
bw1254x is a CMOS 14bit analog-to-digital converter (ADC). It converts the analog input signal into 14bit binary digital codes at a maximum sampling rate of 10MHz.
The device is a monolithic ADC with an on-chip, high-performance, sample-and-hold Amplifier (SHA) and current reference and voltage reference. The structure allows both differential and single-ended input.

FEATURES
*Resolution : 14bit
*Maximum Conversion Rate : 10MHz
*Package Type : 48TSSOP
*Power Supply : 3.3V
*Power Consumption : 120mW (typical)
*Reference Voltage : Internal reference or 2V, 1V (dual reference)
*Input Range : 0.5V ~ 2.5V (2.0VP-P)
*Differential Linearity Error : ±0.7 LSB
*Integral Linearity Error : ±1.5 LSB
*Signal to Noise & Distortion Ratio : 72dB
*Total Harmonic Distortion : 80dB
*Out of Range Indicator
*Digital Output : CMOS Level
*Operating Temperature Range : 0°C ~ 70°C

TYPICAL APPLICATIONS
*Imaging (Copiers, Scanners, Cameras)
*Medical Instruments
*Digital Communication Systems
*uADSL System
TAG 10MSPS, 14-BIT, ADC

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General Description
The CS5581 is a single-channel, 16-bit analog-to-digital converter capable of 200 kSps conversion rate. The input accepts a single-ended analog input signal. On-chip buffers provide high input impedance for both the AIN input and the VREF+ input. This significantly reduces the drive requirements of signal sources and reduces errors due to source impedances. The CS5581 is a delta-sigma converter capable of switching multiple input channels at a high rate with no loss in throughput. The ADC uses a low-latency digital filter architecture. The filter is designed for fast settling and settles to full accuracy in one conversion. The converter's 16-bit data output is in serial format, with the serial port acting as either a master or a slave. The converter is designed to support bipolar, ground-referenced signals when operated from ±2.5V analog supplies.
The CS5581 uses self-calibration to achieve low offset and gain errors. The converter achieves a S/N of 81 dB. Linearity is 0.0007% of full scale.
The converter can operate from an analog supply of 0-5V or from ±2.5V. The digital interface supports standard logic operating from 1.8, 2.5, or 3.3 V.

Features & Description
*Single-ended Analog Input
*On-chip Buffers for High Input Impedance
*Conversion Time = 5 μS
*Settles in One Conversion
*Linearity Error = 0.0007%
*Signal-to-Noise = 81 dB
*S/(N + D) = 81 dB
*DNL = ±0.1 LSB Max.
*Self-calibration:
- Maintains accuracy over time & temperature.
*Simple three/four-wire serial interface
*Power Supply Configurations:
- Analog: +5V/GND; IO: +1.8V to +3.3V
- Analog: ±2.5V; IO: +1.8V to +3.3V
*Power Consumption:
- ADC Input Buffers On: 85 mW
- ADC Input Buffers Off: 60 mW

CS5581-ISZ

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DESCRIPTION
The WM8951L is a low power stereo ADC with an integrated microphone interface and crystal oscillator for clock generation. The WM8951L is ideal for voice recorders, wireless microphones and games console accessories.
Stereo line and mono microphone level audio inputs are provided, along with a mute function, programmable line level volume control and a bias voltage output suitable for an electret type microphone.
Stereo 24-bit multi-bit sigma delta ADCs are used with oversampling decimation filters. Digital audio input word lengths from 16-32 bits and sampling rates from 8kHz to 96kHz are supported.
The device is controlled via a 2 or 3 wire serial interface. The interface provides access to all features including volume controls, mutes and extensive power management facilities. The device is available in a small 28 lead 5x5mm quad flat leadless package (QFN).

FEATURES
*Audio Performance
- ADC SNR 90dB (‘A’ weighted) at 3.3V, 85dB at 1.8V
- Low Power
- 1.42 – 3.6V Digital Supply Operation
- 1.8 – 3.6V Analogue Supply Operation
*Sampling Frequency: 8kHz – 96kHz
*Selectable ADC High Pass Filter
*2 or 3-Wire MPU Serial Control Interface
*Programmable Audio Data Interface Modes
- I2S, Left, Right Justified or DSP
- 16/20/24/32 bit Word Lengths
- Master or Slave Clocking Mode
*Microphone Input and Electret Bias with Side Tone Mixer
*Available in 5x5mm 28-lead QFN package

APPLICATIONS
*Wireless microphones
*Voice recorders
*Games console accessories

WM8951LGEFL, WM8951LGEFL/R

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DESCRIPTION
*Analog Peripherals
*Two 16-Bit ADCs
-±0.75 LSB INL; no missing codes
-Programmable throughput up to 1 Msps (each ADC)
1 external input each; programmable as two single-ended or one differential ADC
-DMA to XRAM or external memory interface
-Data-dependent windowed interrupt generator
*Three Comparators
-16 programmable hysteresis values
-Configurable to generate interrupts or reset
*Internal Voltage Reference
*Precision VDD Monitor/Brown-out Detector
*On-Chip JTAG Debug & Boundary Scan
-On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required)
-Provides breakpoints, single stepping, watchpoints, stack monitor
-Inspect/modify memory and registers
-Superior performance to emulation systems using ICE-chips, target pods, and sockets
-IEEE1149.1 compliant boundary scan
*High-Speed 8051 μC Core
-Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks
-Up to 25 MIPS throughput with 25 MHz system clock
-Expanded interrupt handler
*Memory
-4352 bytes data RAM
-32 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes are reserved)
-External parallel data memory interface
*Digital Peripherals
-59 port I/O; all are 5 V tolerant
-Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial ports available concurrently
-Programmable 16-bit counter/timer array with six capture/compare modules
-5 general-purpose 16-bit counter/timers
-Dedicated watchdog timer; bidirectional reset
-Real-time clock mode using timers or PCA
*Clock Sources
-Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
-External oscillator: Crystal, RC, C, or Clock
-Can switch between clock sources on-the-fly
*Supply Voltage: 2.7 to 3.6 V
-Typical operating current: 18 mA at 25 MHz
-Multiple power saving sleep and shutdown modes
*100-Pin TQFP
*Temperature Range: –40 to +85 °C

TAG ADC, MCU

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Description
The CS5542 / CS5543 chip set is designed to be a complete current measurement data acquisition system.
The CS5542 is a 22-Bit, 2-channel, 5th-order delta sigma modulator.
The CS5543 is a monolithic CMOS, 8-channel digital FIR filter designed to be used with up to
four CS5542’s forming an 8-channel system.
The complete system is capable of cascading up to 1024 channels.
The system supports 22-bit measurement resolution with output conversion rates up to 1 kHz per channel.
JTAG boundary-scan capability is available to facilitate self-test at the system level.
Potential applications for the CS5542/CS5543 system are environmental monitoring, process control systems, color sensing, light measurement, chemical analyzers and photo-diode transducer applications.

Features
* lDelta-Sigma Architecture:
- 5th Order Modulator
- 22-Bit Resolution
* dc Accuracy (fBW = 250Hz):
- Integral Linearity: ±0.001 % F.S.
- Differential Linearity: ±0.5 LSBs
- RMS Noise: 1.1 pARMS
* Pin Selectable Input Range:
- ±400 nA to ±2.5 μA Full Scale
* 8-Channel Digital FIR Filter
* Self-calibration of Offset and Gain
* Low Power: 50 mW /ch for 8-ch system

CS5542-KL
CS5543-KL

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INTRODUCTION
 This Technical Note describes the evaluation board for the AD7719, Low Voltage, Low Power, 16&24- Bit, Dual Sigma Delta ADC.
The AD7719 is a complete analog front end for low frequency measurement applications.
The AD7719 is factory calibrated and therefore does not require field calibration.
The device can accept low level input signals directly from a transducer and produce a serial digital output.
It employs a sigma-delta conversion technique to realize up to 24 bits (Main ADC) or 16 bits (Auxiliary ADC) of no missing codes performance.
The selected input signal is applied to a proprietary programmable gain (Main ADC only) front end based around an analog modulator.
The modulator output is processed by an on-chip digital filter.
The first notch of this digital filter can be programmed via an on-chip control register allowing adjustment of the filter cutoff and output update rate.
Full data on the AD7719 is available in the AD7719 datasheet available from Analog Devices and should be consulted in conjunction with this Technical Note when using the evaluation board.
The evaluation board interfaces to the parallel port of an IBM compatible PC.
Software is available with the evalu- ation board which allows the user to easily program the AD7719.
Other components on the AD7719 Evaluation Board include two AD780s (precision 2.5V references), a 32.7680 kHz crystal and digital buffers to buffer signals to and from the PC.

FEATURES
Full-Featured Evaluation Board for the AD7719 On-Board Reference and Digital Buffers
Various Linking Options PC Software for Control of AD7719

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GENERAL DESCRIPTION
 The XRD64L43 is two 10-bit, monolithic, 40 MSPS ADCs.
Manufactured using a standard CMOS process, the XRD64L43 offers low power, low cost and
excellent performance.
The on-chip track-and-hold amplifier(T/H) and voltage reference (VREF) eliminate the need for external active components, requiring only an external ADC conversion clock for the application.
The XRD64L43 analog input can be driven with ease due to the high input impedance.
The design architecture uses 17 time- interleaved 10- bit SAR ADCs in each converter to achieve high conversion rate of 40 MSPS minimum.
In order to insure and maintain accurate 10-bit operation with respect to time and temperature, XRD64L43 incorporates an auto-calibration circuit which continuously adjusts and matches the offset and linearity of each ADC.
This auto-calibration circuit is transparent to the user after the initial 4.2ms calibration (168,000 initial clock cycles).
The power dissipation is only 200mW at 40 MSPS with +2.7V power supply.
The digital output data is straight binary format, and the tristate disable function is provided for common bus interface.
The XRD64L43 internal reference provides cost savings and simplifies the design/development. The output voltage of the internal reference is set by two external resistors.
The internal reference can be disabled if an external reference is used for a power savings of 50mW.

FEATURES
* 10-Bit Resolution
* Two Monolithic Complete 10-Bit ADCs
* 40 MSPS Conversion Rate
* On-Chip Track-and-Hold
* On-Chip Voltage Reference
* Low 5 pF Input Capacitance
* TTL/CMOS Outputs
* Tri-State Output Buffers
* Single +3.0V Power Supply Operation
* Low Power Dissipation: 200mW-typ @ 2.7V
* Power Down Mode Less Than 5mW
* 75dB Crosstalk (fin=1.0MHz)
* -40°C to +85°C Operation Temperature Range

APPLICATIONS
* Medical Imaging
* Instrumentation
* Data Aquisition Systems
* Digital Comunications

BENEFITS
* Reduction of Components
* Reduction of System Cost
* High Performance @ Low Power Dissipation
* Long Term Time and Temperature Stability

XRD64L43AIV

TAG ADC, CMOS, dual

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FEATURES
· Maximum Sample Rate: 125 MSPS
· 11-Bit Resolution With No Missing Codes
· 84 dBc SFDR at Fin = 50 MHz
· 67.1 dBFS SNR at Fin = 50 MHz
· 92 dB Crosstalk
· Parallel CMOS and DDR LVDS Output Options
· 3.5 dB Coarse Gain and Programmable Fine Gain up to 6 dB for SNR/SFDR Trade-Off
· Digital Processing Block With:
– Offset Correction
– Fine Gain Correction, in Steps of 0.05 dB
– Decimation by 2/4/8
– Built-in and Custom Programmable 24-Tap Low/High /Band Pass Filters
· Supports Sine, LVPECL, LVDS & LVCMOS
· CClloocckksD&utAymCpyclilteudSetaDboilwiznerto 400 mVPP
· Internal Reference; Supports External Reference also
· 64-QFN Package (9mm ´ 9mm)
· Pin Compatible 14-bit and 12-bit Family (ADS62P4X/ADS62P2X)

APPLICATIONS

· Wireless Communications Infrastructure
· Software Defined Radio
· Power Amplifier Linearization
· 802.16d/e
· Medical Imaging
· Radar Systems
· Test and Measurement Instrumentation

DESCRIPTION
ADS62P15 is a dual channel 11-bit A/D converter with maximum sample rates up to 125 MSPS. It combines high performance and low power consumption in a compact 64 QFN package. Using an internal sample and hold and low jitter clock buffer, the ADC supports high SNR and high SFDR at high input frequencies. It has coarse and fine gain options that can be used to improve SFDR performance at lower full-scale input ranges.
ADS62P15 includes a digital processing block that consists of several useful and commonly used digital functions such as ADC offset correction, fine gain correction (in steps of 0.05 dB), decimation by 2,4,8 and in-built and custom programmable filters. By default, the digital processing block is bypassed, and its functions are disabled.
Two output interface options exist – parallel CMOS and DDR LVDS (Double Data Rate). ADS62P15 includes internal references while traditional reference pins and associated decoupling capacitors have been eliminated.
Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (–40°C to 85°C).

ADS62P45
ADS62P44
ADS62P43
ADS62P42

TAG ADC, CMOS, dual, Outputs

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FEATURES
ㅁ Sample Rate: 100ksps
ㅁ Single 5V Supply
ㅁ Bipolar Input Range: ±10V
ㅁ Power Dissipation: 55mW Typ
ㅁ Integral Nonlinearity: ±2.0LSB Max
ㅁ Guaranteed No Missing Codes
ㅁ Signal-to-Noise Ratio: 86dB Typ
ㅁ Operates with Internal or External Reference
ㅁ Internal Synchronized Clock
ㅁ 28-Pin 0.3” PDIP, SSOP and SW Packages
ㅁ Improved 2nd Source to ADS7805 and AD976

APPLICATIONS
ㅁ Industrial Process Control
ㅁ Multiplexed Data Acquisition Systems
ㅁ High Speed Data Acquisition for PCs
ㅁ Digital Signal Processing

DESCRIPTION
The LTC®1605 is a 100ksps, sampling 16-bit A/D converter that draws only 55mW (typical) from a single 5V supply. This easy-to-use device includes sample-andhold, precision reference, switched capacitor successive approximation A/D and trimmed internal clock. The LTC1605’s input range is an industry standard ±10V. Maximum DC specs include ±2.0LSB INL and 16-bits no missing codes over temperature. An external reference can be used if greater accuracy over temperature is needed. The ADC has a microprocessor compatible, 16-bit or two byte parallel output port. A convert start input and a data ready signal (BUSY) ease connections to FIFOs, DSPs and microprocessors.

LTC1605ACG LTC1605ACN LTC1605ACSW LTC1605AIG LTC1605AIN LTC1605AISW LTC1605CG LTC1605CN LTC1605CSW LTC1605IG LTC1605IN LTC1605ISW
TAG ADC

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