The QS5805 clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of five non-inverting outputs. The QS5805 device provides low propagation delay buffering with on-chip skew of 0.7ns for same-transition, same-bank signals.
The QS5805 is characterized for operation at -40°C to +85°C.

*10 CMOS outputs
*Monitor output
*Rail-to-rail output voltage swing
*Input hysteresis for better noise margin
*Guaranteed low skew:
- 0.7ns output skew (same bank)
- 0.8ns output skew (different banks)
- 1.2ns part-to-part skew
*Std., A, and B speed grades
*Available in QSOP and SOIC packages

QS5805A, QS5805B
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