The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and outputs differential PECL clock and retimed data signals.
The GS9035A can operate in either auto or manual rate selection mode. In auto mode the GS9035A is ideal for multi-rate serial data protocols such as SMPTE 259M. In this mode the GS9035A automatically detects and locks onto the incoming data signal. For single rate data systems, the GS9035A can be configured to operate in manual mode. In both modes, the GS9035A requires only one external resistor to set the VCO centre frequency and provides adjustment-free operation.
The GS9035A has dedicated pins to indicate LOCK and data rate. In addition, an internal muting function forces the serial data outputs to a static state when input data is not present or when the PLL is not locked. The serial clock outputs can also be disabled resulting in a 10% power savings.
The GS9035A is packaged in a 28 pin PLCC and operates from a single +5 or -5 volt power supply.

*adjustment-free operation
*auto-rate selection for 5 SMPTE data rates: 143, 177, 270, 360, 540Mb/s
*data rate indication output
*serial data output mute when PLL is not locked
*immune to harmonic locking
*operation independent of SAV/EAV sync signals
*low jitter, low power
*single external VCO resistor for operation with five input data rates
*large input jitter tolerance: typically 0.45 UI beyond loop bandwidth
*power savings mode (output serial clock disable)
*system friendly: serial clock remains active when data outputs muted
*robust lock detect
*Pb-free and Green

The GS9035A is used for Clock and Data recovery, and Jitter elimination for all high speed serial digital interface applications involving SMPTE 259M and other data standards.


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