General Description
The ADC16V130 is a monolithic high performance CMOS analog-to-digital converter capable of converting analog input signals into 16-bit digital words at rates up to 130 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an onchip sample-and-hold circuit to minimize power consumption and external component count while providing excellent dynamic performance. Automatic power-up calibration enables excellent dynamic performance and reduces part-to-part variation, and the ADC16V130 could be re-calibrated at any time by asserting and then de-asserting power-down. An integrated low noise and stable voltage reference and differential reference buffer amplifier easies board level design. On-chip duty cycle stabilizer with low additive jitter allows wide duty cycle range of input clock without compromising its dynamic performance. A unique sample-and-hold stage yields a fullpower bandwidth of 1.4 GHz. The digital data is provided via full data rate LVDS outputs – making possible the 64-pin, 9mm x 9mm LLP package. The ADC16V130 operates on dual power supplies +1.8V and +3.0V with a power-down feature to reduce the power consumption to very low levels while allowing fast recovery to full operation.

*Dual Supplies: 1.8V and 3.0V operation
*On chip automatic calibration during power-up
*Low power consumption
*Multi-level multi-function pins for CLK/DF and PD
*Power-down and sleep modes
*On chip precision reference and sample-and-hold circuit
*On chip low jitter duty-cycle stabilizer

*High IF Sampling Receivers
*Multi-carrier Base Station Receivers GSM/EDGE, CDMA2000, UMTS, LTE and WiMax
*Test and Measurement Equipment
*Communications Instrumentation
*Data Acquisition
*Portable Instrumentation


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