The WM8580 is a multi-channel audio CODEC with S/PDIF transceiver. The WM8580 is ideal for DVD and surround sound processing applications for home hi-fi, automotive and other audiovisual equipment.
Integrated into the device is a stereo 24-bit multi-bit sigma delta ADC with support for digital audio output word lengths from 16-bit to 32-bit, and sampling rates from 8kHz to 192kHz.
Also included are three stereo 24-bit multi-bit sigma delta DACs, each with a dedicated oversampling digital interpolation filter. Digital audio input word lengths from 16- bits to 32-bits and sampling rates from 8kHz to 192kHz are supported. Each DAC channel has independent digital volume and mute control.
Two independent audio data interfaces support I2S, Left Justified, Right Justified and DSP digital audio formats.
Each audio interface can operate in either Master Mode or Slave Mode.
The S/PDIF transceiver is IEC-60958-3 compatible and supports frame rates from 32k/s to 96k/s. It has four multiplexed inputs and one output. Status and error monitoring is built-in and results can reported over the serial interface or via GPO pins. S/PDIF Channel Block configuration is also supported.
The device has two PLLs that can be configured independently to generate two system clocks for internal or external use.
Device control and setup is via a 2-wire or 3-wire (SPI compatible) serial interface. The serial interface provides access to all features including channel selection, volume controls, mutes, de-emphasis, S/PDIF control/status, and power management facilities. Alternatively, the device has a Hardware Control Mode where device features can be enabled/disabled using selected pins.
The device is available in a 48-lead TQFP package.

• Multi-channel CODEC with 3 Stereo DACs and 1 Stereo ADC
• Integrated S/PDIF / IEC-60958-3 transceiver
• Audio Performance
− 103dB SNR (‘A’ weighted @ 48kHz) DAC
− -90dB THD (48kHz) DAC
− 100dB SNR (‘A’ weighted @ 48kHz) ADC
− -87dB THD (48kHz) ADC
• DAC Sampling Frequency: 8kHz – 192kHz
• ADC Sampling Frequency: 8kHz – 192kHz
• Independent ADC and DAC Sample Rates
• 2 and 3-Wire Serial Control Interface with readback, or
Hardware Control Interface
• GPO pins allow visibility of user selected status flags
• Programmable Audio Data Interface Modes
− I2S, Left, Right Justified or DSP
− 16/20/24/32 bit Word Lengths
• Three Independent Stereo DAC Outputs with Digital
Volume Controls
• Two Independent Master or Slave Audio Data Interfaces
• Flexible Digital Interface Routing with Clock Selection Control
• 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital Supply Operation
• 48-lead TQFP Package

• Digital TV
• DVD Players and Receivers
• Surround Sound AV Processors and Hi-Fi systems
• Automotive Audio


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The WM8805 is a high performance consumer mode S/PDIF transceiver with support for 8 received Channels and 1 transmitted Channel.
A crystal derived, or externally provided high quality master clock is used to allow low jitter recovery of S/PDIF supplied master clocks.
Generation of all typically used audio clocks is possible using the high performance internal PLL. A dedicated CLKOUT pin provides a high drive clock output.
A pass through option is provided which allows the device simply to be used to clean up (de-jitter) the received digital audio signals.
The device may be used under software control or stand alone hardware control modes. In software control mode, both 2-wire with read back and 3-wire interface modes are supported.
Status and error monitoring is built-in and results can be read back over the control interface, on the GPO pins or streamed over the audio data interface in ‘With Flags’ mode (audio data with status flags appended).
The audio data interface supports I2S, left justified, right justified and DSP audio formats of 16-24 bit word length, with sample rates from 32 to 192ks/s.
The device is supplied in a 28-lead Pb-free SSOP package.

• S/PDIF (IEC60958-3) compliant.
• Advanced jitter attenuating PLL with low intrinsic period jitter of 50 ps RMS.
• S/PDIF recovered clock using PLL, or stand alone crystal derived clock generation.
• Supports 10 – 27MHz crystal clock frequencies.
• 2-wire / 3-Wire serial or hardware control interface.
• Programmable Audio data interface modes:
- I2S, Left, Right Justified or DSP
- 16/20/24 bit word lengths
• 8 channel receiver input and 1 channel transmit output.
• Auto frequency detection / synchronisation.
• Selectable output status data bits.
• Up to 8 configurable GPO pins.
• De-emphasis flag output.
• Non-audio detection including DOLBYTM and DTSTM.
• Channel status changed flag.
• Configurable clock distribution with selectable output MCLK rate of 512fs, 256fs, 128fs and 64fs.
• 2.7 to 3.6V digital and PLL supply voltages.
• 28-lead SSOP package.

• Surround Sound AV processors and Hi-Fi systems
• Music industry applications
• Digital TV


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The WM8213 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors (CIS) at pixel sample rates of up to 24MSPS.
The device includes three analogue signal processing channels each of which contains Reset Level Clamping, Correlated Double Sampling and Programmable Gain and Offset adjust functions. Three multiplexers allow single channel processing. The output from each of these
channels is time multiplexed into a single high-speed 16-bit Analogue to Digital Converter. The digital output data is available in 8-bit wide multiplexed format and there is also an optional single byte output mode, or 4-bit multiplexed LEGACY mode.
An internal 4-bit DAC is supplied for internal reference level generation. This may be used during CDS to reference CIS signals or during Reset Level Clamping to clamp CCD signals. An external reference level may also be supplied. ADC references are generated internally, ensuring optimum performance from the device.
Using an analogue supply voltage of 3.3V and a digital interface supply of 3.3V, the WM8213 typically only consumes 350mW.

• 16-bit ADC
• 24MSPS conversion rate
• Low power – 350mW typical
• 3.3V single supply operation
• Single, 2 or 3 channel operation
• Correlated double sampling
• Programmable gain (9-bit resolution)
• Programmable offset adjust (8-bit resolution)
• Flexible clamp control with programmable clamp voltage
• Flexible timing, can be made compatible with WM819X and WM815X parts.
• 8-bit wide multiplexed data output format
• 8-bit only output mode
• 4-bit LEGACY multiplexed nibble mode
• Internally generated voltage references
• 28-lead SSOP package, pin compatible with WM8199
• Serial control interface

• High speed USB2.0 compatible scanners
• Multi-function peripherals
• High-performance CCD sensor interface
• Digital Copiers


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 The WM9714L is a highly integrated input/output device designed for mobile computing and communications. The chip is architected for dual CODEC operation, supporting Hi-Fi stereo Codec functions via the AC link interface, and additionally supporting voice Codec functions via a PCM type Synchronous Serial Port (SSP). A third, auxiliary DAC is provided which may be used to support generation of supervisory tones, or ring-tones at different sample rates to the
main codec.

 The device can connect directly to mono or stereo microphones, stereo headphones and a stereo speaker, reducing total component count in the system. Cap-less connections to the headphones, speakers, and earpiece may be used, saving cost and board area. Additionally, multiple analog input and output pins are provided for seamless integration with analog connected wireless communication devices.

 All device functions are accessed and controlled through a single AC-Link interface compliant with the AC’97 standard. The 24.576 MHz masterclock can be input directly or generated internally from a 13MHz (or other frequency) clock by an on-chip PLL. The PLL supports a wide range of input clock from 2.048MHz to 78.6MHz.

 The WM9714L operates at supply voltages from 1.8V to 3.6V. Each section of the chip can be powered down under software control to save power. The device is available in a small
leadless 7x7mm QFN package, ideal for use in hand-held portable systems.

• AC’97 Rev 2.2 compatible stereo codec
- DAC SNR 94dB, THD –85dB
- ADC SNR 87dB, THD –86dB
- Variable Rate Audio, supports all WinCE sample rates
- Tone Control, Bass Boost and 3D Enhancement
• On-chip 45mW headphone driver
• On-chip 400mW mono or stereo speaker drivers
• Stereo, mono or differential microphone input
- Automatic Level Control (ALC)
- Mic insert and mic button press detection
• Auxiliary mono DAC (ring tone or DC level generation)
• Seamless interface to wireless chipset
• Additional PCM/I2S interface to support voice CODEC
• PLL derived audio clocks.
• Supports input clock ranging from 2.048MHz to 78.6MHz
• 1.8V to 3.6V supplies (digital down to 1.62V, speaker up to 4.2V)
• 7x7mm 48-lead QFN package

• Personal Digital Assistants (PDA) with or without phone
• Smartphones
• Handheld and Tablet Computers



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