Description
The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base−emitter resistor. These digital transistors are designed to replace a single device and its external resistor bias network. The BRT eliminates these individual components by integrating them into a single device. In the UMC2NT1 series, two complementary BRT devices are housed in the SOT−353 package
which is ideal for low power surface mount applications where board space is at a premium.

Features
• Pb−Free Packages are Available
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Available in 8 mm, 7 inch/3000 Unit Tape and Reel

UMC2NT1, UMC2NT1G, UMC3NT1, UMC3NT1G, UMC3NT2, UMC5NT1, UMC5NT2, UMC5NT2G

Description
Housed in SOIC−8 or PDIP−8 package, the NCP1200A enhances the previous NCP1200 series by offering a reduced optocoupler current together with an increased drive capability. Due to its novel concept, the circuit allows the implementation of complete off−line AC−DC adapters, battery charger or a SMPS where standby power is a key parameter.
With an internal structure operating at a fixed 40 kHz, 60 kHz or 100 kHz, the controller supplies itself from the high−voltage rail, avoiding the need of an auxiliary winding. This feature naturally eases the designer task in battery charger applications. Finally, current−mode control provides an excellent audio−susceptibility and inherent pulse−by−pulse control.
When the current setpoint falls below a given value, e.g. the output power demand diminishes, the IC automatically enters the so−called skip cycle mode and provides excellent efficiency at light loads.
Because this occurs at a user adjustable low peak current, no acoustic noise takes place.
The NCP1200A features an efficient protective circuitry which, in presence of an overcurrent condition, disables the output pulses while the device enters a safe burst mode, trying to restart. Once the default has gone, the device auto−recovers.

Features
• Pb−Free Packages are Available
• No Auxiliary Winding Operation
• Auto−Recovery Internal Output Short−Circuit Protection
• Extremely Low No−Load Standby Power
• Current−Mode Control with Skip−Cycle Capability
• Internal Temperature Shutdown
• Internal Leading Edge Blanking
• 250 mA Peak Current Capability
• Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHz
• Direct Optocoupler Connection
• SPICE Models Available for TRANsient and AC Analysis
• Pin to Pin Compatible with NCP1200

NCP1200AP40, NCP1200AP40G, NCP1200AD40R2, NCP1200AP60, NCP1200AP60G
NCP1200AD60R2, NCP1200AD60R2G, NCP1200AP100, NCP1200AP100G, NCP1200AD100R2
NCP1200AD100R2G

Description
The MC34063A Series is a monolithic control circuit containing the
primary functions required for DC–to–DC converters. These devices
consist of an internal temperature compensated reference, comparator,
controlled duty cycle oscillator with an active current limit circuit,
driver and high current output switch. This series was specifically
designed to be incorporated in Step–Down and Step–Up and
Voltage–Inverting applications with a minimum number of external
components. Refer to Application Notes AN920A/D and AN954/D
for additional design information.

Feature
• Operation from 3.0 V to 40 V Input
• Low Standby Current
• Current Limiting
• Output Switch Current to 1.5 A
• Output Voltage Adjustable
• Frequency Operation to 100 kHz
• Precision 2% Reference

MC34063A, MC33063A, MC33063AD, MC33063ADR2, MC33063AP1, MC33063AVD, MC33063AVDR2, MC33063AVP, MC34063AD, MC34063ADR2, MC34063AP1, MC34063BD, MC34063BDR2, MC34063AM, MC34063AMEL, MC34063AML1, MC34063AML2, MC34063AMR1, MC34063AMR2

Description
  The MC74HC541A is identical in pinout to the LS541. The device inputs are compatible with Standard CMOS outputs. External pullup resistors make them compatible with LSTTL outputs.
The HC541A is an octal non–inverting buffer/line driver/line receiver designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. This device features inputs and outputs on opposite sides of the package and two ANDed active–low output enables.
  The HC541A is similar in function to the HC540A, which has inverting outputs.

Features
  • Output Drive Capability: 15 LSTTL Loads
  • Outputs Directly Interface to CMOS, NMOS and TTL
  • Operating Voltage Range: 2 to 6V
  • Low Input Current: 1mA
  • High Noise Immunity Characteristic of CMOS Devices
  • In Compliance With the JEDEC Standard No. 7A Requirements
  • Chip Complexity: 134 FETs or 33.5 Equivalent Gates

MC74HC541AN, MC74HC541ADW, MC74HC541ADWR2

Features
• Shipped in plastic bags, 1000 per bag
• Available Tape and Reeled, 5000 per reel, by adding a “RL” suffix to the part number
• Available in Fan−Fold Packaging, 3000 per box, by adding a “FF” suffix to the part number
• These devices are manufactured with a Pb−Free external lead finish only*

Mechanical Characteristics
• Case: Epoxy, Molded
• Weight: 0.4 gram (approximately)
• Finish: All External Surfaces Corrosion Resistant and Terminal Leads are Readily Solderable
• Lead and Mounting Surface Temperature for Soldering Purposes:
  220°C Max. for 10 Seconds, 1/16 in. from case
• Polarity: Cathode Indicated by Polarity Band

1N4001, 1N4002, 1N4003, 1N4004, 1N4005, 1N4006, 1N4007

Description
The MC74HC595A consists of an 8–bit shift register and an 8–bit D–type latch with three–state parallel outputs. The shift register accepts serial data and provides a serial output. The shift register also provides parallel data to the 8–bit latch. The shift register and latch have independent clock inputs. This device also has an asynchronous reset for the shift register.
The HC595A directly interfaces with the SPI serial data port on CMOS MPUs and MCUs.

• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 328 FETs or 82 Equivalent Gates
• Improvements over HC595
  - Improved Propagation Delays
  - 50% Lower Quiescent Power
  - Improved Input Noise and Latchup Immunity

MC74HC595AN, MC74HC595AD, MC74HC595ADR2, MC74HC595ADT, MC74HC595ADTR2

Description
Utilizing the circuit designs perfected for Quad Operational Amplifiers, these dual operational amplifiers feature low power drain, a common mode input voltage range extending to ground/VEE, and single supply or split supply operation. The LM358 series is equivalent to one–half of an LM324.

• Short Circuit Protected Outputs
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 32 V (LM258/LM358) 3.0 V to 26 V (LM2904, A, V)
• Low Input Bias Currents
• Internally Compensated
• Common Mode Range Extends to Negative Supply
• Single and Split Supply Operation
• ESD Clamps on the Inputs Increase Ruggedness of the Device without Affecting Operation

LM358, LM258, LM2904, LM2904A, LM2904V, NCV2904

The LM324 series are low–cost, quad operational amplifiers with
true differential inputs. They have several distinct advantages over
standard operational amplifier types in single supply applications. The
quad amplifier can operate at supply voltages as low as 3.0 V or as
high as 32 V with quiescent currents about one–fifth of those
associated with the MC1741 (on a per amplifier basis). The common
mode input range includes the negative supply, thereby eliminating the
necessity for external biasing components in many applications. The
output voltage range also includes the negative power supply voltage.

• Short Circuited Protected Outputs
• True Differential Input Stage
• Single Supply Operation: 3.0 V to 32 V (LM224, LM324, LM324A)
• Low Input Bias Currents: 100 nA Maximum (LM324A)
• Four Amplifiers Per Package
• Internally Compensated
• Common Mode Range Extends to Negative Supply
• Industry Standard Pinouts
• ESD Clamps on the Inputs Increase Ruggedness without Affecting Device Operation



LM324, LM324A, LM224, LM2902, LM2902V, NCV2902