The MC33170 is a complete solution for drain modulated dual–band GSM 900MHz and DCS–1800MHz Power Amplifiers. Thanks to its internal decoder, the MC33170 drastically simplifies the interface between the PAs and the baseband logic section, providing an immediate gain in part count but also in occupied copper area. The device is also ready for 1V platforms since it accepts logic high control signals down to 900mV@25°C. A priority management system ensures the negative is present before authorizing the power modulation, giving the necessary ruggedness to the final design. This function can easily be disabled for PAs not requiring a negative bias. The device is able to directly drive an external P or N–channel with the possibility to linearize the overall response via the internal high–performance control amplifier and easily implement system gain. Finally, an LDO delivers a stable voltage, usable for external biasing purposes.
• 1V platform compatible: ON voltage = 900mV, OFF voltage = 300mV max
• Priority management system prevents power modulation before negative bias establishes
• High performance 4.5MHz gain–bandwidth product operational amplifier
• Drives N or P–channel MOSFET
• 2.5V low–noise LDO
• Idle mode input for very low power consumption (standby mode)

MC33170DTB MC33170DTBR2

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The MC14060B is a 14–stage binary ripple counter with an on–chip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits. Also included on the chip is a reset function which places all outputs into the zero state and disables the oscillator. A negative transition on Clock will advance the counter to the next state. Schmitt trigger action on the input line permits very slow input rise and fall times. Applications include time delay circuits, counter controls, and frequency dividing circuits.
• Fully static operation
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 V to 18 V
• Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range
• Buffered Outputs Available from Stages 4 Through 10 and 12 Through 14
• Common Reset Line
• Pin–for–Pin Replacement for CD4060B

MC14060BCP MC14060BD MC14060BDR2 MC14060BDT MC14060BDTR2 MC14060BF MC14060BFEL
TAG Counter

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The NCP300 and NCP301 series are second generation ultra−low current voltage detectors. These devices are specifically designed for use as reset controllers in portable microprocessor based systems where extended battery life is paramount. Each series features a highly accurate undervoltage detector with hysteresis which prevents erratic system reset operation as the comparator threshold is crossed. The NCP300 series consists of complementary output devices that are available with either an active high or active low reset output. The NCP301 series has an open drain N−Channel output with either an active high or active low reset output. The NCP300 and NCP301 device series are available in the Thin TSOP−5 package with standard undervoltage thresholds. Additional thresholds that range from 0.9 V to 4.9 V in 100 mV steps can be manufactured.

• Quiescent Current of 0.5 A Typical
• High Accuracy Undervoltage Threshold of 2.0%
• Wide Operating Voltage Range of 0.8 V to 10 V
• Complementary or Open Drain Reset Output
• Active Low or Active High Reset Output
• Pb−Free Packages are Available Typical Applications
• Microprocessor Reset Controller
• Low Battery Detection
• Power Fail Indicator
• Battery Backup Detection

TAG Detector

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The SN74LS85 is a 4-Bit Magnitude Camparator which compares two 4-bit words (A, B), each word having four Parallel Inputs (A0–A3, B0–B3); A3, B3 being the most significant inputs. Operation is not restricted to binary codes, the device will work with any monotonic code. Three Outputs are provided: “A greater than B” (OA>B), “A less than B” (OA<B), “A equal to B” (OA=B). Three Expander Inputs, IA>B, IA<B, IA=B, allow cascading without external gates. For proper compare operation, the Expander Inputs to the least significant position must be connected as follows: IA<B= IA>B = L, IA=B = H. For serial (ripple) expansion, the OA>B, OA<B and OA=B Outputs are connected respectively to the IA>B, IA<B, and IA=B Inputs of the next most significant comparator, as shown in Figure 1. Refer to Applications section of data sheet for high speed method of comparing large words. The Truth Table on the following page describes the operation of the SN74LS85 under all possible logic conditions. The upper 11 lines
describe the normal operation under all conditions that will occur in a single device or in a series expansion scheme. The lower five lines describe the operation under abnormal conditions on the cascading inputs. These conditions occur when the parallel expansion technique is used.

• Easily Expandable
• Binary or BCD Comparison
• OA>B, OA<B, and OA=B Outputs Available


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High–Performance Silicon–Gate CMOS
The MC74HC132A is identical in pinout to the LS132. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The HC132A can be used to enhance noise immunity or to square up slowly changing waveforms.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 72 FETs or 18 Equivalent Gates


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The MC14049B Hex Inverter/Buffer and MC14050B Noninverting Hex Buffer are constructed with MOS P−Channel and N−Channel enhancement mode devices in a single monolithic structure. These complementary MOS devices find primary use where low power dissipation and/or high noise immunity is desired. These devices provide logic level conversion using only one supply voltage, VDD. The input−signal high level (VIH) can exceed the VDD supply voltage for logic level conversions. Two TTL/DTL loads can be driven when the devices are used as a CMOS−to−TTL/DTL converter (VDD = 5.0 V, VOL ? 0.4 V, IOL . 3.2 mA). Note that pins 13 and 16 are not connected internally on these devices; consequently connections to these terminals will not affect circuit operation.

• High Source and Sink Currents
• High−to−Low Level Converter
• Supply Voltage Range = 3.0 V to 18 V
• VIN can exceed VDD
• Meets JEDEC B Specifications
• Improved ESD Protection On All Inputs
• Pb−Free Packages are Available*

MC14050B MC14049BD MC14049BDG MC14049BDR2 MC14049BDR2G
TAG Buffer

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This new series of digital transistors is designed to replace a single device  and  its  external  resistor  bias  network.  The Bias Resistor Transistor  (BRT) contains a single transistor with a
monolithic bias network consisting of two resistors; a series base resistor and a base−emitter  resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC−59 package which is designed for low power surface mount applications.
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• Moisture Sensitivity Level: 1
• ESD Rating − Human Body Model: Class 1
  ESD Rating − Machine Model: Class B
• The SC−59 package can be soldered using wave or reflow. The modified gull−winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die.
• Pb−Free Package is Available

MUN2111T1G MUN2112T1 MUN2112T1G MUN2113T1

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 The MC14013B dual type D flip–flop is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary outputs (Q and Q). These devices may be used as shift register elements or as type T flip–flops for counter and toggle applications.
• Static Operation
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Logic Edge–Clocked Flip–Flop Design
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going
edge of the clock pulse
• Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range
• Pin–for–Pin Replacement for CD4013B

MC14013BCP MC14013BD MC14013BDR2 MC14013BDT
TAG Flip-Flop

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Designed for general purpose power and switching such as output or driver stages in applications such as switching regulators, converters, and power amplifiers.

• Pb−Free Packages are Available
• Lead Formed for Surface Mount Application in Plastic Sleeves (No Suffix)
• Straight Lead Version in Plastic Sleeves (“−1” Suffix)
• Lead Formed Version in 16 mm Tape and Reel for Surface Mount (“T4” Suffix)
• Electrically Similar to Popular D44H/D45H Series
• Low Collector Emitter Saturation Voltage − VCE(sat) = 1.0 Volt Max @ 8.0 Amperes
• Fast Switching Speeds
• Complementary Pairs Simplifies Designs
• Epoxy Meets UL 94, V−0 @ 0.125 in
• ESD Ratings: Human Body Model, 3B >8000 V
                            Machine Model, C >400 V

MJD45H11 MJD44H11G MJD44H11T5 MJD45H11

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The MC78M00/MC78M00A Series positive voltage regulators are identical to the popular MC7800 Series devices, except that they are specified for only half the output current. Like the MC7800 devices, the MC78M00 three−terminal regulators are intended for local, on−card voltage regulation. Internal current limiting, thermal shutdown circuitry and safe−area compensation for the internal pass transistor combine to make these devices remarkably rugged under most operating conditions. Maximum output current, with adequate heatsinking is 500 mA.

• No External Components Required
• Internal Thermal Overload Protection
• Internal Short Circuit Current Limiting
• Output Transistor Safe−Area Compensation
• MC78M00A High Accuracy (±2%) Available for 5.0 V, 8.0 V, 12 V and 15 V
• Pb−Free Packages are Available


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