Description
The MC34066/MC33066 are high performance resonant mode controllers designed for off–line and dc–to–dc converter applications that utilize frequency modulated constant on–time or constant off–time control. These integrated circuits feature a variable frequency oscillator with programmable deadtime, precision retriggerable one–shot timer, temperature compensated reference, high gain wide–bandwidth error amplifier with a precision output clamp, steering flip–flop, and dual high current totem pole outputs ideally suited for driving power MOSFETs. Also included are protective features consisting of a high speed fault comparator and latch, programmable soft–start circuitry, input undervoltage lockout with selectable thresholds, and reference undervoltage lockout. These devices are available in dual–in–line and surface mount packages.

Features
*Variable Frequency Oscillator with a Control Range Exceeding 1000:1
*Programmable Oscillator Deadtime Allows Constant Off–Time Operation
*Precision Retriggerable One–Shot Timer
*Internally Trimmed Bandgap Reference
*5.0 MHz Error Amplifier with Precision Output Clamp
*Dual High Current Totem Pole Outputs
*Selectable Undervoltage Lockout Thresholds with Hysteresis
*Enable Input
*Programmable Soft–Start Circuitry
*Low Startup Current for Off–Line Operation

MC33066, MC34066DW, MC34066P, MC33066DW, MC33066P

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Description
The MC13028A is a third generation C–QUAM stereo decoder targeted for use in low voltage, low cost AM/FM E.T.R. radio applications. Advanced features include a signal quality detector that analyzes signal strength, signal to noise ratio, and stereo pilot tone before switching to the stereo mode. A “blend function” much like FM stereo has been added to improve the transition from mono to stereo. The audio output level is adjustable to allow easy interface with a variety of AM/FM tuner chips. The external components have been minimized to keep the total system cost low.

Features
*Adjustable Audio Output Level
*Stereo Blend Function
*Stereo Threshold Adjustment
*Operation from 2.2 V to 12 V Supply
*Precision Pilot Tone Detector
*Forced Mono Function
*Single Pinout VCO
*IF Amplifier with IF AGC Circuit
*VCO Shutdown Mode at Weak Signal Condition

MC13028AD, MC13028AP

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Description
The SN54/74LS196 decade counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8, 4, 2, 1) sequence or in a bi-quinary mode producing a 50% duty cycle output. The SN54/74LS197 contains divide-by-two and divide-by-eight sections which can be combined to form a modulo-16 binary counter. Low Power Schottky technology is used to achieve typical count rates of 70 MHz and power dissipation of only 80 mW.
Both circuit types have a Master Reset (MR) input which overrides all other inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL) overrides clocked operations and asynchronously loads the data on the Parallel Data inputs (Pn) into the flip-flops. This preset feature makes the circuits usable as programmable counters. The circuits can also be used as 4-bit latches, loading data from the Parallel Data inputs when PL is LOW and storing the data when PL is HIGH.

Features
*Low Power Consumption — Typically 80 mW
*High Counting Rates — Typically 70 MHz
*Choice of Counting Modes — BCD, Bi-Quinary, Binary
*Asynchronous Presettable
*Asynchronous Master Reset
*Easy Multistage Cascading
*Input Clamp Diodes Limit High Speed Termination Effects

SN74LS196, SN54LS197, SN74LS197

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DESCRIPTION
The MC74VHC4066 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power–supply range (from VCC to GND).
The VHC4066 is identical in pinout to the metal–gate CMOS MC14066 and the high–speed CMOS HC4066A. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches.
The ON/OFF control inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. For analog switches with voltage–level translators, see the VHC4316.

FEATURES
*Fast Switching and Propagation Speeds
*High ON/OFF Output Voltage Ratio
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Analog Input Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066
*Low Noise
*Chip Complexity: 44 FETs or 11 Equivalent Gates

MC74VHC4066D,  MC74VHC4066DT, 74VHC4066

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DESCRIPTION
The MC74VHCT4051 utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF leakage currents. This analog multiplexer/demultiplexer controls analog voltages that may vary across the complete power supply range (from VCC to GND).
The VHCT4051 is identical in pinout to the high–speed HC4051A and the metal–gate MC14051B. The Channel–Select inputs determine which one of the Analog Inputs/Outputs is to be connected by means of an analog switch to the Common Output/Input. When the Enable pin is HIGH, all analog switches are turned off.
The Channel–Select and Enable inputs are compatible with TTL–type input thresholds. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the higher–voltage power supply.
The MC74VHCT4051 input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows the MC74VHCT4051 to be used to interface 5V circuits to 3V circuits.
This device has been designed so that the ON resistance (Ron) is more linear over input voltage than Ron of metal–gate CMOS analog switches.
For a multiplexer/demultiplexer with channel–select latches, see VHC4351.

FEATURES
*Fast Switching and Propagation Speeds
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Analog Power Supply Range (VCC – GND) = 2.0 to 6.0 V
*Digital (Control) Power Supply Range (VCC – GND) = 2.0 to 6.0 V
*Improved Linearity and Lower ON Resistance Than Metal–Gate Counterparts
*Low Noise
*In Compliance With the Requirements of JEDEC Standard No. 7A

MC74VHCT1051D, MC74VHCT4051DT

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DESCRIPTION
The MC54/74HC4066A utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full power–supply range (from VCC to GND).
The HC4066A is identical in pinout to the metal–gate CMOS MC14016 and MC14066. Each device has four independent switches. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches.
The ON/OFF control inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
For analog switches with voltage–level translators, see the HC4316A.

FEATURES
*Fast Switching and Propagation Speeds
*High ON/OFF Output Voltage Ratio
*Low Crosstalk Between Switches
*Diode Protection on All Inputs/Outputs
*Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Analog Input Voltage Range (VCC – GND) = 2.0 to 12.0 Volts
*Improved Linearity and Lower ON Resistance over Input Voltage than the MC14016 or MC14066
*Low Noise
*Chip Complexity: 44 FETs or 11 Equivalent Gates

MC74HC4066A, MC54HCXXXXAJ, MC74HCXXXXAN, MC74HCXXXXAD, MC74HCXXXXADT

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DESCRIPTION
The MC74VHC244 is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The MC74VHC244 is a noninverting 3–state buffer, and has two active–low output enables.
This device is designed to be used with 3–state memory address drivers, etc.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.

Features

* High Speed: tPD = 3.9ns (Typ) at VCC = 5V
* Low Power Dissipation: ICC = 4mA (Max) at TA = 25°C
* High Noise Immunity: VNIH = VNIL = 28% VCC
* Power Down Protection Provided on Inputs
* Balanced Propagation Delays
* Designed for 2V to 5.5V Operating Range
* Low Noise: VOLP = 0.9V (Max)
* Pin and Function Compatible with Other Standard Logic Families
* Latchup Performance Exceeds 300mA
* ESD Performance: HBM > 2000V; Machine Model > 200V
* Chip Complexity: 136 FETs or 34 Equivalent Gates

MC74VHCXXXDW
MC74VHCXXXDT
MC74VHCXXXM
TAG Buffer

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DESCRIPTION
 The MCM20014 is a fully integrated, high performance CMOS image sensor with features such as integrated timing control, and analog signal processing for digital imaging applications.
The part provides designers a complete imaging solution with a monolithic image capture and processing engine thus making it a true “camera on a chip”.
System benefits enable design of smaller, portable, low cost and low power systems.
Thereby making the product suitable for a variety of consumer applications including still/full motion imaging, security/surveillance, and automotive among others.
The imaging pixels are based on active CMOS pixels using pinned photodiodes that are realized using Motorola’s sub-micron ImageMOSTM technology.
The frame rate is completely adjustable from 0 to 30 frames per second without adjusting the system clock from 10Mhz.
Each pixel on the sensor is individually addressable allowing the user to control “Window of Interest” (WOI) panning and zooming, sub-sampling, resolution, exposure, gain, and other image processing features via a two pin I2C interface.
Programmable digital signal processing blocks included in the data path are bad-pixel replacement and noise compensation for image enhancement.
The sensor is run by supplying a single Master Clock.
The sensor output is 8 or 10 digital bits depending on output mode selected.

Features
* VGA resolution, active CMOS image sensor with square pixel unit cells
* 7.8μm pitch pixels with patented pinned photodiode architecture
* Bayer-RGB color filter array with optional micro lenses
* High sensitivity, quantum efficiency, and charge conversion efficiency
* Low fixed pattern noise / Wide dynamic range
* Antiblooming and continuous variable speed shutter
* Single master clock operation
* Digitally programmable via I2C interface
* Integrated on-chip timing/logic circuitry
* CDS sample and hold for suppression of low frequency and correlated reset noise
* 48X programmable variable gain to optimize dynamic range and facilitate white balance and iris adjustment
* 10-bit, pipelined algorithmic RSD ADC
* User selectable digital output formats:
* 8-bit companded data
* 10-bit linear data
* Column offset correction, and Bad Pixel Replacement for noise suppression
* Pixel addressability to support ‘Window of Interest’ windowing, resolution, and subsampling
* 30fps full VGA at 10Mhz Master Clock Rate
* Single 3.3V power supply
* 48 pin CLCC package

MCM20014IBMN
MCM20014IBB

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The MC34016 is a telephone line interface meant for use in cordless telephone base stations for CT0, CT1, CT2 and DECT. The circuit forms the interface towards the telephone line and performs all speech and line interface functions like dc and ac line termination, 2–4 wire conversion, automatic gain control and hookswitch control. Adjustment of transmission
parameters is accomplished by two 8–bit registers accessible via the integrated serial bus interface and by external components.
• DC Masks for Voltage and Current Regulation
• Supports Passive or Active AC Set Impedance Applications
• Double Wheatstone Bridge Sidetone Architecture
• Symmetrical Inputs and Outputs with Large Signal Swing Capability
• Gain Setting and Mute Function for Tx and Rx Amplifiers
• Very Low Noise Performance
• Serial Bus Interface SPI Compatible
• Operation from 3.0 to 5.5 V

FEATURES
Line Driver Architecture
• Two DC Masks for Voltage Regulation
• Two DC Masks for Current Regulation
• Passive or Active Set Impedance Adjustment
• Double Wheatstone Bridge Architecture
• Automatic Gain Control Function

Transmit Channel
• Symmetrical Inputs Capable of Handling Large Voltage Swing
• Gain Select Option via Serial Bus Interface
• Transmit Mute Function, Programmable via Bus
• Large Voltage Swing Capability at the Telephone Line

Receive Channel
• Double Sidetone Architecture for Optimum Line Matching
• Symmetrical Outputs Capable of Producing High Voltage Swing
• Gain Select Option via Serial Bus Interface
• Receive Mute Function, Programmable via Serial Bus

Serial Bus Interface
• 3–Wire Connection to Microcontroller
• One Programmable Output Meant for Driving a Hookswitch
• Two Programmable Outputs Capable of Driving Low Ohmic Loads
• Two 8–Bit Registers for Parameter Adjustment


MC34016P
MC34016DW

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Features
• Low-cost HC05 core
• 16-pin PDIP, 16-pin SOIC package, or 20-pin SSOP
• 928 bytes of user ROM, including eight bytes of user vectors
• 64 bytes of user RAM
• Low-power operation at 1.8 V — VDD minimum (EEPROM read only)
• 128 bits of personality EEPROM (not memory mapped) programmed using CPU software or with on-chip serial programming ROM
• On-chip charge pump for in-circuit programming of the personality EEPROM at 2.7 to 5.5 Vdc
• 8-bit free-running timer
• 4-stage selectable real-time interrupt generator
• 10 bidirectional input/output (I/O) lines including:
– 8-mA sink capability on four I/O pins (PA7–PA4)
– Mask option for software programmable pulldowns on all I/O pins
– Mask option for port interrupts on four I/O pins (PA3–PA0) (keyboard scan feature)
• IRQ interrupt hardware mask, flag bit, and request bit
• Mask option for sensitivity on IRQ interrupt (edge- and level-sensitive or edge-sensitive only)
• On-chip oscillator (mask options for crystal/ceramic resonator oscillator with internal 2-MW resistor and 2-pin or 3-pin resistor capacitor (RC) oscillator)
• Mask option for reduced startup delay time with RC oscillator options
• Mask option for computer operating properly (COP) watchdog system
• Power-saving stop mode and wait mode instructions
• Mask option to convert STOP instruction to halt mode
• Illegal address reset
• Internal steering diode and pullup resistor on RESET pin to VDD
• Internal RESET pin pulldown from COP watchdog and ILADR

Mask Options
The MC68HC05K3 contains these eight mask options:
1. COP watchdog timer (enable or disable)
2. IRQ triggering (edge-sensitive or edge- and level-sensitive)
3. Port A interrupts (enable or disable)
4. Port software programmable pulldowns (enable or disable)
5. STOP instruction (enable or disable)
6. Oscillator type (crystal/ceramic resonator or RC)
7. RC oscillator type (2-pin or 3-pin)
8. RC oscillator startup delay (4064 or 16 f cycles)

Introduction
 The MC68HC05K3 has a 1024-byte memory map. Therefore, it uses only the lower 10 bits of the address bus. In the following discussion, the upper six bits of the address bus can be ignored. Also, by using a mask option, the STOP instruction can be converted from acting as the normal
STOP instruction.
 The stack area also is reduced to 32 bytes due to the limited amount of RAM. Therefore, the stack pointer is reduced to only five bits, only decrements down to $00E0, and then wraps around to $00FF. All other instructions and registers behave as described in M6805 HMOS/M146805 CMOS Family User’s Manual,Motorola document order number M6805UM/AD3.

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