DESCRIPTION
The GS9029 is a second generation bipolar integrated circuit designed to drive four 75Ω co-axial cables.
The GS9029 features two pairs of complementary outputs whose amplitude is controlled within ±7.5%. The output signal levels are also adjustable from 50mVp-p up to 1000mVp-p with little change in other performance parameters. The amplitude of the output stage is varied by adjusting the RSET resistor value. The patented current mode outputs ensure superior output return loss and minimal over shoot. The rise/fall time circuitry allows wide range operation and provides symmetrical balanced outputs to reject power supply noise. In addition high output isolation ensures that the cable driver outputs are not affected by the performance or status of other outputs. Operational with input amplitudes as low as 80mV, the GS9029 provides a robust serial interface.
The GS9029 is packaged in a 16 pin narrow SOIC and operates from a single +5 or -5 volt supply. Typical system power consumption is 320mW which is 40% less than the GS9007.

FEATURES
*SMPTE 259M compliant
*four isolated outputs (two complimentary pairs), adjustable from 50mV-1000mV into 75Ω loads
*operational from 143Mb/s to 540Mb/s and beyond
*nominal 500ps rise/fall times
*precise ±7.5% output amplitudes
*40% system power reduction over GS9007
*75Ω on-chip input termination resistors
*input hysteresis
*operational down to 80mV input amplitude
*superior output isolation
*"Bus Through" expansion port for fan out requirements

APPLICATIONS
4ƒsc, 4:2:2 and 4:4:4:4 serial digital video co-axial transmission interfaces from 143 to 540Mb/s; General purpose cable driving applications (co-axial cable or UTP).

GS9029-CKD, GS9029-CTD

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DESCRIPTION
The GS9068 is a second generation high-speed bipolar integrated circuit designed to drive one or two 75Ω co-axial cables at data rates up to 540Mb/s.
The GS9068 accepts a LVPECL level differential input, which may be AC coupled. External biasing resistors at the inputs are not required.
Power consumption is typically 160mW using a +3.3V DC power supply.

KEY FEATURES
*SMPTE 259M and SMPTE 344M compliant
*dual coaxial cable driving outputs
*50Ω differential PECL input
*single 3.3V power supply operation
*space-saving 8-lead SOIC
*operating temperature range: 0°C to 70°C
*pin compatible with GS1528 HD-LINX™ II multirate SDI dual slew-rate cable driver
*Pb-free and Green

APPLICATIONS
*SMPTE 259M Coaxial Cable Serial Digital Interfaces

GS9068-CKA, GS9068-CTA, GS9068-CKAE3, GS9068-CTAE3
TAG cable, Driver, SD, SDI

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DESCRIPTION
The GS9032 encodes and serializes SMPTE 125M and 244M bit parallel digital video signals, and other 8-bit or 10-bit parallel formats. This device performs sync detection, parallel to serial conversion, data scrambling (using the X9 + X4 + 1 algorithm), 10x parallel clock multiplication and conversion of NRZ to NRZI serial data. The GS9032 features auto standard and adjustment free operation for data rates to 540Mb/s with a single VCO resistor. Other features include a lock detect output, NRZI encoding, SMPTE scrambler bypass, a sync detect disable, and an isolated quad output cable driver suitable for driving 75Ω loads. The complementary cable driving output swings
can be adjusted independently or the secondary differential cable driver can be powered down.
The GS9032 requires a single +5 volt or -5 volt supply and typically consumes 675mW of power while driving four 75Ω loads.

FEATURES
*SMPTE 259M and 540Mb/s compliant
*serializes 8-bit or 10-bit data
*autostandard, adjustment free operation
*minimal external components (no loop filter components required)
*isolated, quad output, adjustable cable driver
*power saving secondary cable driver disable
*3.3V and 5.0V CMOS/TTL compatible inputs
*lock detect indication
*SMPTE scramble and NRZI coding bypass option
*EDH support with GS9001, GS9021
*Pb-free and RoHS Comliant

APPLICATION
SMPTE 259M and 540Mb/s parallel to serial interfaces for video cameras, VTRs, and signal generators; generic parallel to serial conversion.

GS9032-CVM, GS9032-CTM, GS9032-CVME3, GS9032-CTME3

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Description
The GS9078A is a second generation high-speed BiCMOS integrated circuit designed to drive one or two 75Ω co-axial cables.
The GS9078A may drive data rates up to 540Mb/s and provides two selectable slew rates in order to achieve compliance to SMPTE 259M and SMPTE 344M.
The GS9078A accepts a LVPECL level differential input that may be AC coupled. External biasing resistors at the inputs are not required.
Power consumption is typically 168mW using a 3.3V power supply. The GS9078A is Pb-free, and the encapsulation compound does not contain halogenated flame retardant.
This component and all homogeneous subcomponents are RoHS compliant.

Features
*SMPTE 259M and SMPTE 344M compliant
*Dual coaxial cable driving outputs with selectable slew rate
*50Ω differential PECL input
*Pb-free and RoHS compliant
*Seamless interface to other HD-LINX® II family products
*Single 3.3V power supply operation
*Operating temperature range: 0°C to 70°C

Applications
*SMPTE 259M and SMPTE 344M Coaxial Cable Serial Digital Interfaces.

GS9078ACNE3

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DESCRIPTION
The GS9035A is a high performance clock and data recovery IC designed for serial digital data. The GS9035A receives either single-ended or differential PECL data and outputs differential PECL clock and retimed data signals.
The GS9035A can operate in either auto or manual rate selection mode. In auto mode the GS9035A is ideal for multi-rate serial data protocols such as SMPTE 259M. In this mode the GS9035A automatically detects and locks onto the incoming data signal. For single rate data systems, the GS9035A can be configured to operate in manual mode. In both modes, the GS9035A requires only one external resistor to set the VCO centre frequency and provides adjustment-free operation.
The GS9035A has dedicated pins to indicate LOCK and data rate. In addition, an internal muting function forces the serial data outputs to a static state when input data is not present or when the PLL is not locked. The serial clock outputs can also be disabled resulting in a 10% power savings.
The GS9035A is packaged in a 28 pin PLCC and operates from a single +5 or -5 volt power supply.

FEATURES
*adjustment-free operation
*auto-rate selection for 5 SMPTE data rates: 143, 177, 270, 360, 540Mb/s
*data rate indication output
*serial data output mute when PLL is not locked
*immune to harmonic locking
*operation independent of SAV/EAV sync signals
*low jitter, low power
*single external VCO resistor for operation with five input data rates
*large input jitter tolerance: typically 0.45 UI beyond loop bandwidth
*power savings mode (output serial clock disable)
*system friendly: serial clock remains active when data outputs muted
*robust lock detect
*Pb-free and Green

APPLICATIONS
The GS9035A is used for Clock and Data recovery, and Jitter elimination for all high speed serial digital interface applications involving SMPTE 259M and other data standards.

GS9035ACPJ, GS9035ACTJ, GS9035ACPJE3, GS9035ACTJE3

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DEVICE DESCRIPTION
The GF9103 is specifically designed to simplify conversions from 4:2:2 component digital video to analog RGB or analog YCBCR component video. The GF9103 simplifies this process by performing 4:2:2 to 8:8:8 interpolation, digital color space conversion and digital SIN X/X correction in a single device. Immediately following the GF9103, three over-sampled channels of RGB or YCBCR data may be passed through Digital to Analog converters and simplified analog reconstruction filters.
The GF9103 accepts a single 10 bit stream of 4:2:2 data and internally de-multiplexes it into three 10 bit channels of YCBCR data. The YCBCR data is then passed through three linear phase FIR filters that over-sample the Y data by a factor of 2 and the CB and CR data by a factor of 4.
While operating in an over-sampled RGB output mode, the interpolated YCBCR data is passed through the internal color space converter to convert the YCBCR data to RGB data according to CCIR-601. Alternatively, the color space converter may be bypassed to obtain over-sampled YCBCR (8:8:8) output data. While operating in YCBCR output mode, setup may be dynamically inserted into the Luminance channel.
Prior to output rounding, over-sampled YCBCR or RGB data may be corrected for SIN X/X characteristics of D/A conversion. Output data may be rounded to 10 or 8 bit resolution per channel. CB and CR may be presented as signed or unsigned data.
The GF9103 is packaged in a 68 pin PLCC package, operates with a single +5 V power supply and typically consumes only 85 mA of current when operated at 27 MHz.

FEATURES
*4:2:2 to over-sampled RGB or YCBCR conversion in a single device
*single 10 bit 4:2:2 input
*internal 4:2:2 de-multiplexer
*4:2:2 to 8:8:8 interpolation filters
*internal YCBCR to RGB color space conversion
*optional YCBCR (8:8:8) output mode
*setup insertion in Luminance channel under user control
*user selectable digital SIN X/X correction
*rounding to 10/8 bit resolution per output channel
*40 MHz maximum clock rate
*single +5 V power supply

APPLICATIONS
*Over-Sampling 4:2:2 to Analog RGB Conversions for video monitoring
*Over-Sampling 4:2:2 to Analog YCBCR Conversions for video monitoring

GF9103-CPS, GF9103-CTS

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Description
The GS1560A/GS1561 is a reclocking deserializer.
When used in conjunction with the GS1524 Automatic Cable Equalizer and the GO1555/GO1525* Voltage Controlled Oscillator, a receive solution can be realized  for HD-SD, SD-SDI and DVB-ASI applications.
In addition to reclocking and deserializing the input data stream, the GS1560A/GS1561 performs NRZI-to-NRZ decoding, descrambling as per SMPTE 259M-C/292M, and word alignment when operating in SMPTE mode. When operating in DVB-ASI mode, the device will word align the data to K28.5 sync characters and 8b/10b decode the received stream.
Two serial digital input buffers are provided with a 2x1 multiplexer to allow the device to select from one of two serial digital input signals.
The integrated reclocker features a very wide Input Jitter Tolerance of ±0.3 UI (total 0.6 UI), a rapid asynchronous lock time, and full compliance with DVB-ASI data streams.
The GS1560A includes an integrated cable driver is serial input loop-through applications. It can be selected to output either buffered or reclocked data. The cable driver also features an output mute on loss of signal, high impedance mode, adjustable signal swing, and automatic dual slew-rate selection depending on HD/SD operational requirements.
The GS1560A/GS1561 also includes a range of data processing functions such as error detection and correction, automatic standards detection, and EDH support. The device can also detect and extract SMPTE 352M payload identifier packets and independently identify the received video standard. This information read from internal registers via the host interface port.
Line-based CRC errors, line number errors, TRS errors, EDH CRC errors and ancillary data checksum errors can all be detected.
Finally, the device can correct detected errors and insert new TRS ID words, line-based CRC words, ancillary data checksum words, EDH CRC words, and line numbers. Illegal code re-mapping is also available. All processing functions may be individually enabled disabled via host interface control.
The GS1560A/GS1561 is Pb-free and the encapsulation compound does not contain halogenated flame retardant.
This component and all homogeneous subcomponents are RoHS compliant.

Key Features
*SMPTE 292M and SMPTE 259M-C compliant descrambling and NRZI → NRZ decoding (with
bypass)
*DVB-ASI sync word detection and 8b/10b decoding
*auto-configuration for HD-SDI, SD-SDI and DVB-ASI
*serial loop-through cable driver output selectable as reclocked or non-reclocked (GS1560A only)
*dual serial digital input buffers with 2 x 1 mux
*integrated serial digital signal termination
*integrated reclocker
*automatic or manual rate selection / indication (HD/SD)
*descrambler bypass option
*user selectable additional processing features including:
*CRC, TRS, ANC data checksum, line number and EDH CRC error detection and correction
*programmable ANC data detection
*illegal code remapping
*internal flywheel for noise immune H, V, F extraction
*FIFO load Pulse
*20-bit / 10-bit CMOS parallel output data bus
*148.5MHz / 74.25MHz / 27MHz / 13.5MHz parallel digital output
*automatic standards detection and indication
*Pb-free and RoHS Compliant
*1.8V core power supply and 3.3V charge pump power supply
*3.3V digital I/O supply
*JTAG test interface
*small footprint compatible with GS9060, GS1532, and GS9062

Applications
*SMPTE 292M Serial Digital Interfaces
*SMPTE 259M-C Serial Digital Interfaces
*DVB-ASI Serial Digital Interfaces

GS1561, GS1560ACF, GS1560ACFE3, GS1561-CF, GS1561-CFE3
TAG Dual-Rate

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CIRCUIT DESCRIPTION
The GX4314 is a wideband video multiplexer implemented in bipolar technology. This device is characterized by excellent differential phase and gain in the enabled state, very high off-isolation in the disabled state and fully buffered unilateral signal path. Make-before-break switching assures virtually glitch-free switching.
For use in NxM routing matrices, the GX4314 features a very high, nearly constant input impedance coupled with high output impedance in the disabled state. This allows multiple devices to be paralleled at the inputs and outputs without additional circuitry.
Logic inputs are TTL and 5V CMOS compatible, providing address and chip select functions. The operation of the devices is described in the Truth Table below. The wideband GX4314 is pin for pin compatible with the high performance GX414, extending the flat frequency response characteristics from 50 to 100 MHz.

FEATURES
*low differential phase and gain
*wide bandwidth, 100 MHz at -1 dB (Flattened)
*small switching transient
*±4.5 to ± 11 volts supplies

APPLICATIONS
*HDTV
*Very high quality video switching
*Very high density video switching
*Computer graphics
*PCM / data routing

GX4314-CDB, GX4314-CKB

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DEVICE DESCRIPTION
The GS9002 is a monolithic bipolar integrated circuit designed to serialize SMPTE 125M and SMPTE 244M bit parallel digital signals as well as other 8 or 10 bit parallel formats.
This device performs the functions of sync detection, parallel to serial conversion, data scrambling (using the X9 + X4 +1 algorithm), 10x parallel clock multiplication and conversion of NRZ to NRZI serial data.
It supports any of four selectable serial data rates from 100 Mb/s to over 360 Mb/s.
The data rates are set by resistors and are selected by an on-board 2:4 decoder having two TTL level input address lines.
Other features such as a sync detector output, a sync detector disable input, and a lock detect output are also provided.
The X9 + X4 + 1 scrambler and NRZ to NRZI converter may be bypassed to allow the output of the parallel to serial converter to be directly routed to the output drivers.
The GS9002 provides pseudo-ECL outputs for the serial data and serial clock as well as a single-ended pseudo-ECL output of the regenerated parallel clock.
The GS9002 directly interfaces with cable drivers GS9007, GS9008 and GS9009.
The device requires a single +5 volt or -5 volt supply and typically consumes 713 mW of power while driving 100 Ω loads.
The 44 pin PLCC packaging assures a small footprint for the complete encoder function.

FEATURES
*fully compatible with SMPTE-259M serial digital standard
*supports up to four serial bit rates to 400 Mb/s
*accepts 8 bit and 10 bit TTL and CMOS compatible parallel data inputs
*X9 + X4 + 1 scrambler, NRZI converter and sync detector may be disabled for transparent data
transmission
*pseudo-ECL serial data and clock outputs
*single +5 or -5 volt supply
*713 mW typical power dissipation (including ECL pull-down loads).
*44 pin PLCC packaging

APPLICATIONS
*4ƒSC, 4:2:2 and 360 Mb/s serial digital interfaces for Video cameras, VTRs, Signal generators


GS9002 - CPM

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Description
The GS9090B is a 270Mb/s reclocking deserializer with an internal FIFO.
It provides a complete receive solution for SD-SDI and DVB-ASI applications.
In addition to reclocking and deserializing the input data stream, the GS9090B performs NRZI-to-NRZ decoding, descrambling as per SMPTE 259M-C, and word alignment when operating in SMPTE mode.
When operating in DVB-ASI mode, the device will word align the data to K28.5 sync characters and 8b/10b decode the received stream.
The internal reclocker features a very wide input jitter tolerance, and is fully compatible with both SMPTE and DVB-ASI input streams.
The GS9090B includes a range of data processing functions such as EDH support (error detection and handling), and automatic standards detection.
The device can also detect and extract SMPTE 352M payload identifier packets and independently identify the received video standard.
 This information is read from internal registers via the host interface port.
The GS9090B also incorporates a video line-based FIFO.
This FIFO may be used in four user-selectable modes to carry out tasks such as data alignment / delay, clock phase interchange, MPEG packet extraction and clock rate interchange, and ancillary data packet extraction.
Parallel data outputs are provided in 10-bit multiplexed format, with the associated parallel clock output signal operating at 27MHz.
The device may also be used in a low-latency data pass through mode where only descrambling and word alignment will be performed in SMPTE mode.

Key Features
* SMPTE 259M-C compliant descrambling and NRZI to NRZ decoding (with bypass)
* DVB-ASI sync word detection and 8b/10b decoding
* Integrated line-based FIFO for data alignment/delay, clock phase interchange, DVB-ASI
data packet extraction and clock rate interchange, and ancillary data packet extraction
* Integrated VCO and reclocker
* Automatic or manual selection between SMPTE video and DVB-ASI data
* User selectable additional processing features including:
* TRS, ANC data checksum, and EDH CRC error detection and correction
* programmable ANC data detection
* illegal code remapping
* Internal flywheel for noise immune H, V, F extraction
* Automatic standards detection and indication
* Enhanced Gennum Serial Peripheral Interface (GSPI)
* JTAG test interface
* Polarity insensitive for DVB-ASI and SMPTE signals
* +1.8V core power supply with optional +1.8V or +3.3V I/O power supply
* Small footprint (8mm x 8mm)
* Low power operation (typically 145mW)
* Pb-free

Applications
* SMPTE 259M-C Serial Digital Interfaces
* DVB-ASI Serial Digital Interfaces

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